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Change RF settings

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This commit is contained in:
Telekatz 2017-07-22 23:22:11 +02:00
parent 50fe2f13bd
commit cfcc4a270f
7 changed files with 107 additions and 66 deletions
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2
boop/Makefile
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@ -55,7 +55,7 @@ ifeq ($(MAKECMDGOALS),debug)
COMPILE += -D DEBUGMODE COMPILE += -D DEBUGMODE
OPTFLAGS = -O0 OPTFLAGS = -O0
else else
OPTFLAGS = -Os OPTFLAGS = -Og
endif endif
ifeq ($(MAKECMDGOALS),release) ifeq ($(MAKECMDGOALS),release)

BIN
boop/boop_rom.bin
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Binary file not shown.

124
boop/cc1100/cc1100.c
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@ -26,58 +26,74 @@
#include "cc1100.h" #include "cc1100.h"
#include "irq.h" #include "irq.h"
//setting 6_WOR // Deviation = 21.423340
const unsigned char conf[0x2F] = { // Base frequency = 433.254913
0x29, // IOCFG2 // Carrier frequency = 433.254913
0x2E, // IOCFG1 // Channel number = 0
0x06, // IOCFG0 // Carrier frequency = 433.254913
0x47, // FIFOTHR // Modulated = true
0xD3, // SYNC1 // Modulation format = GFSK
0x91, // SYNC0 // Manchester enable = false
0x3E, // PKTLEN // Sync word qualifier mode = 30/32 sync word bits detected
0x1A, // PKTCTRL1 // Preamble count = 4
0x45, // PKTCTRL0 // Channel spacing = 184.982300
0x01, // ADDR // Carrier frequency = 433.254913
0x01, // CHANNR // Data rate = 37.4908
0x06, // FSCTRL1 // RX filter BW = 210.937500
0x00, // FSCTRL0 // Data format = Normal mode
0x10, // FREQ2 # // CRC enable = true
0x0B, // FREQ1 # // Whitening = false
0xDA, // FREQ0 # -> 433,249969 MHz // Device address = 1
0x8A, // MDMCFG4 // Address config = Address check and 0 (0x00) broadcast
0x75, // MDMCFG3 // CRC autoflush = true
0x13, // MDMCFG2 // PA ramping = false
0x22, // MDMCFG1 // TX power = 0
0xC1, // MDMCFG0 CHANSPC_M // Rf settings for CC1101
0x35, // DEVIATN const unsigned char conf[] = {
0x04, // MCSM2 0x29, // IOCFG2 GDO2 Output Pin Configuration
0x0C, // MCSM1 0c 0x2E, // IOCFG1 GDO1 Output Pin Configuration
0x38, // MCSM0 0x06, // IOCFG0 GDO0 Output Pin Configuration
0x16, // FOCCFG 0x47, // FIFOTHR RX FIFO and TX FIFO Thresholds
0x6C, // BSCFG 0xD3, // SYNC1 Sync Word, High Byte
0x43, // AGCCTRL2 0x91, // SYNC0 Sync Word, Low Byte
0x40, // AGCCTRL1 0x3E, // PKTLEN Packet Length
0x91, // AGCCTRL0 0x1A, // PKTCTRL1 Packet Automation Control
0x46, // WOREVT1 0x05, // PKTCTRL0 Packet Automation Control
0x50, // WOREVT0 0x01, // ADDR Device Address
0x78, // WORCTRL 0x00, // CHANNR Channel Number
0x56, // FREND1 0x06, // FSCTRL1 Frequency Synthesizer Control
0x10, // FREND0 0x00, // FSCTRL0 Frequency Synthesizer Control
0xA9, // FSCAL3 0x10, // FREQ2 Frequency Control Word, High Byte
0x0A, // FSCAL2 0x0B, // FREQ1 Frequency Control Word, Middle Byte
0x00, // FSCAL1 0xE6, // FREQ0 Frequency Control Word, Low Byte
0x11, // FSCAL0 0x8A, // MDMCFG4 Modem Configuration
0x41, // RCCTRL1 0x6C, // MDMCFG3 Modem Configuration
0x00, // RCCTRL0 0x13, // MDMCFG2 Modem Configuration
0x57, // FSTEST 0x22, // MDMCFG1 Modem Configuration
0x7F, // PTEST 0xC1, // MDMCFG0 Modem Configuration
0x3F, // AGCTEST 0x35, // DEVIATN Modem Deviation Setting
0x98, // TEST2 0x04, // MCSM2 Main Radio Control State Machine Configuration
0x31, // TEST1 0x0C, // MCSM1 Main Radio Control State Machine Configuration
0x0B // TEST0 0x38, // MCSM0 Main Radio Control State Machine Configuration
0x16, // FOCCFG Frequency Offset Compensation Configuration
0x6C, // BSCFG Bit Synchronization Configuration
0x43, // AGCCTRL2 AGC Control
0x40, // AGCCTRL1 AGC Control
0x91, // AGCCTRL0 AGC Control
0x46, // WOREVT1 High Byte Event0 Timeout
0x50, // WOREVT0 Low Byte Event0 Timeout
0x78, // WORCTRL Wake On Radio Control
0x56, // FREND1 Front End RX Configuration
0x10, // FREND0 Front End TX Configuration
0xE9, // FSCAL3 Frequency Synthesizer Calibration
0x2A, // FSCAL2 Frequency Synthesizer Calibration
0x00, // FSCAL1 Frequency Synthesizer Calibration
0x1F, // FSCAL0 Frequency Synthesizer Calibration
0x41, // RCCTRL1 RC Oscillator Configuration
0x00, // RCCTRL0 RC Oscillator Configuration
}; };
const unsigned char confasync[0x2F] = { const unsigned char confasync[] = {
0x0D, // IOCFG2 0x0D, // IOCFG2
0x0D, // IOCFG1 0x0D, // IOCFG1
0x2E, // IOCFG0 0x2E, // IOCFG0
@ -120,12 +136,6 @@ const unsigned char confasync[0x2F] = {
0x1F, // FSCAL0 0x1F, // FSCAL0
0x41, // RCCTRL1 0x41, // RCCTRL1
0x00, // RCCTRL0 0x00, // RCCTRL0
0x59, // FSTEST
0x7F, // PTEST
0x3F, // AGCTEST
0x81, // TEST2
0x35, // TEST1
0x09 // TEST0
}; };
void cc1100_init(void) { void cc1100_init(void) {
@ -164,7 +174,7 @@ void cc1100_init(void) {
while (SSPSR & (1<<4)); while (SSPSR & (1<<4));
xx = SSPDR; xx = SSPDR;
cc1100_write((0x00 | BURST ),(unsigned char*)conf,0x2f); cc1100_write((0x00 | BURST ),(unsigned char*)conf,sizeof(conf));
cc1100_write1(PATABLE,0xC0); cc1100_write1(PATABLE,0xC0);
cc1100_strobe(SIDLE); cc1100_strobe(SIDLE);
cc1100_strobe(SPWD); cc1100_strobe(SPWD);

4
boop/cc1100/cc1100.h
View file

@ -118,8 +118,8 @@
#define MARCSTATE_IDLE 0x01 #define MARCSTATE_IDLE 0x01
#define MARCSTATE_RX 0x0d #define MARCSTATE_RX 0x0d
const unsigned char conf[0x2F] __attribute__((aligned(0x4))); extern const unsigned char conf[]; //__attribute__((aligned(0x4)));
const unsigned char confasync[0x2F] __attribute__((aligned(0x4))); extern const unsigned char confasync[];// __attribute__((aligned(0x4)));
void cc1100_init(void); void cc1100_init(void);
unsigned char cc1100_write(unsigned char addr, unsigned char* data, unsigned char length); unsigned char cc1100_write(unsigned char addr, unsigned char* data, unsigned char length);

4
boop/cc1100/rf.c
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@ -485,14 +485,14 @@ void RFasyncmode(unsigned char on) {
RF_changestate(RFidle); RF_changestate(RFidle);
while(RF.state != RFidle); while(RF.state != RFidle);
stopRFIRQ(); stopRFIRQ();
cc1100_write((0x00 | BURST ),(unsigned char*)confasync,0x2f); cc1100_write((0x00 | BURST ),(unsigned char*)confasync,sizeof((unsigned char*)confasync));
cc1100_write1(PATABLE,0xf0); cc1100_write1(PATABLE,0xf0);
PINSEL1 &= 0xfffffffc; // GDO0 as GPIO PINSEL1 &= 0xfffffffc; // GDO0 as GPIO
FIODIR0 |= GDO0; // output FIODIR0 |= GDO0; // output
} }
else { else {
PINSEL1 |= 1; // GDO0 as EINT0 PINSEL1 |= 1; // GDO0 as EINT0
cc1100_write((0x00 | BURST ),(unsigned char*)conf,0x2f); cc1100_write((0x00 | BURST ),(unsigned char*)conf,sizeof((unsigned char*)conf));
cc1100_write1(PATABLE,0xC0); cc1100_write1(PATABLE,0xC0);
cc1100_strobe(SIDLE); cc1100_strobe(SIDLE);
load_RF_setting(); load_RF_setting();

29
boop/gui/testmenu.c
View file

@ -862,6 +862,35 @@ void test_RF(void) {
cur_ep->bufferlen = 3; cur_ep->bufferlen = 3;
cur_ep->flags |= EPenabled | EPoutput | EPnewdata | EPonce | EPsendwor; cur_ep->flags |= EPenabled | EPoutput | EPnewdata | EPonce | EPsendwor;
RF_changestate(RFtx);
} else if(KEY_1)
{
struct RFendpoint_* cur_ep;
cur_ep = openEP(0,0, packet_test);
if(cur_ep) {
cur_ep->dest = destAddr;
cur_ep->data[0] = 'X';
cur_ep->data[1] = '1';
cur_ep->data[2] = 0x00;
cur_ep->bufferlen = 3;
cur_ep->flags |= EPenabled | EPoutput | EPnewdata | EPonce;
RF_changestate(RFtx);
}
}
else if(KEY_2)
{
struct RFendpoint_* cur_ep;
cur_ep = openEP(0,0, packet_test);
cur_ep->dest = destAddr;
cur_ep->data[0] = 'X';
cur_ep->data[1] = '2';
cur_ep->data[2] = 0x00;
cur_ep->bufferlen = 3;
cur_ep->flags |= EPenabled | EPoutput | EPnewdata | EPonce ;
RF_changestate(RFtx); RF_changestate(RFtx);
} }
} }

10
boop/infrared/ir_rf.c
View file

@ -42,7 +42,7 @@ extern volatile unsigned long keyMap[42];
#define IRRF_WAIT 0x01 #define IRRF_WAIT 0x01
#define IRRF_BITTIME 40 #define IRRF_BITTIME 40
#define IRRF_WAITTIME 125 #define IRRF_WAITTIME 100
void __attribute__ ((section(".text.fastcode"))) IRRF_Encode (void) void __attribute__ ((section(".text.fastcode"))) IRRF_Encode (void)
{ {
@ -63,6 +63,7 @@ void __attribute__ ((section(".text.fastcode"))) IRRF_Encode (void)
} }
break; break;
} }
T1MR0 = 15*1000;
} }
void IRRF_Init(unsigned char map) void IRRF_Init(unsigned char map)
@ -100,9 +101,10 @@ void IRRF_Repeat(void)
struct RFendpoint_* cur_ep; struct RFendpoint_* cur_ep;
cur_ep = (struct RFendpoint_*)ir.general.trail; cur_ep = (struct RFendpoint_*)ir.general.trail;
if((cur_ep) && !(cur_ep->flags & EPnewdata)) { if((cur_ep) && !(cur_ep->flags & EPnewdata)) {
cur_ep->dest = (ir.actcmd & 0xff00) >> 8; cur_ep->dest = 0;
cur_ep->data[0] = (ir.actcmd & 0x00ff); cur_ep->data[1] = (ir.actcmd & 0x00ff);
cur_ep->bufferlen = 1; cur_ep->data[0] = (ir.actcmd & 0xff00) >> 8;
cur_ep->bufferlen = 2;
cur_ep->flags |= EPenabled | EPoutput | EPnewdata; cur_ep->flags |= EPenabled | EPoutput | EPnewdata;
RF_changestate(RFtx); RF_changestate(RFtx);