Merge branch 'IR_HW_PWM'
This commit is contained in:
commit
50fe2f13bd
42 changed files with 434 additions and 277 deletions
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@ -25,8 +25,9 @@
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|||
#ARMPATH = $(ARMBASE)/bin/
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TOOLPREFIX = arm-none-eabi-
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LPCTOOL = lpctool
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OPENOCDPATH = F:\Tools\OpenOCD
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OPENOCD = $(OPENOCDPATH)\openocd.exe -f betty.cfg -f $(OPENOCDPATH)\interface\uniprog.cfg
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OPENOCDPATH = F:\Tools\OpenOCD_0_10
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#OPENOCD = $(OPENOCDPATH)\bin\openocd.exe -f $(OPENOCDPATH)\scripts\interface\jlink.cfg -f betty.cfg
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OPENOCD = $(OPENOCDPATH)\bin\openocd.exe -f $(OPENOCDPATH)\scripts\interface\uniprog.cfg -f betty.cfg
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###############################################################
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#####
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@ -42,12 +43,9 @@ OD = $(ARMPATH)$(TOOLPREFIX)objdump
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SIZE = $(ARMPATH)$(TOOLPREFIX)size
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CPUFLAGS = -mcpu=arm7tdmi-s
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OPTFLAGS = -Os
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CFLAGS = -Wall -mthumb-interwork
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CFLAGS = -Wall -mthumb-interwork -g3 -c
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INC = -I. -Iinterrupt -Idisplay -Ikeyboard -Iaudio -Iinfrared -Iserial -Iflash -Icc1100 -Igui -Itimer -Igames -Iadc -Irtc -Itools
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ASFLAGS = -g -I. -mthumb-interwork
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#LDFLAGS = -Tlpc2220_rom.ld -Map boop.map
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#LIBS = -lc -lgcc
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LDFLAGS = -mthumb-interwork -nostartfiles -Xlinker -Map -Xlinker boop.map -Tlpc2220_rom.ld
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THUMBFLAGS = -mthumb
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@ -55,6 +53,9 @@ COMPILE = $(CC) $(CPUFLAGS) $(CFLAGS) $(INC)
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ifeq ($(MAKECMDGOALS),debug)
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COMPILE += -D DEBUGMODE
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OPTFLAGS = -O0
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else
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OPTFLAGS = -Os
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endif
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ifeq ($(MAKECMDGOALS),release)
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@ -157,7 +157,7 @@ void beep(unsigned char n) {
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SIDsetfrq(0,5001);
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break;
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}
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PWMPR = 0;
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//PWMPR = 0;
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switchSound(SOUND_ON);
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SID.flags |= SIDenable;
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SID.reg[REG_Control] |= GATE;
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@ -101,12 +101,12 @@ struct SID_ {
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struct SID_ SID;
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unsigned int playtone_cb;
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unsigned char *playtone[3];
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unsigned char playstate;
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unsigned char tonelen[3];
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unsigned short playcounter;
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unsigned short playcountermax;
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extern unsigned int playtone_cb;
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extern unsigned char *playtone[3];
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extern unsigned char playstate;
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extern unsigned char tonelen[3];
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extern unsigned short playcounter;
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extern unsigned short playcountermax;
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void SIDsetfrq(unsigned char voice, unsigned short frq);
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void SIDsetadsr(unsigned char voice,unsigned char attack, unsigned char decay, unsigned char sustain, unsigned char release);
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@ -769,6 +769,7 @@ const unsigned char song1[] = {
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0xa2,0x25,0x00,0x00,0x21,0x11,0x70,0xd2,0x0f,0x00,0x00,0x21,0x00,0x70,
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0xa2,0x25,0x00,0x00,0x21,0x11,0x70,0xd2,0x0f,0x00,0x00,0x21,0x00,0x70,
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0xa2,0x25,0x00,0x00,0x21,0x11,0x70,0xd2,0x0f,0x00,0x00,0x21,0x00,0x70,
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/*
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0x1f,0x15,0x00,0x00,0x21,0x11,0x70,0xc3,0x10,0x00,0x00,0x21,0x00,0x70,
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0x1f,0x15,0x00,0x00,0x21,0x11,0x70,0xc3,0x10,0x00,0x00,0x21,0x00,0x70,
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0x1f,0x15,0x00,0x00,0x21,0x11,0x70,0xc3,0x10,0x00,0x00,0x21,0x00,0x70,
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@ -1001,4 +1002,5 @@ const unsigned char song1[] = {
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0xc1,0x2c,0x00,0x00,0x21,0x11,0x70,0x31,0x1c,0x00,0x00,0x21,0x00,0x70,
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0xc1,0x2c,0x00,0x00,0x21,0x11,0x70,0x31,0x1c,0x00,0x00,0x21,0x00,0x70,
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0xc1,0x2c,0x00,0x00,0x21,0x11,0x70,0x31,0x1c,0x00,0x00,0x21,0x00,0x70
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*/
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};
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|
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@ -20,6 +20,7 @@
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#include "sound.h"
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#include "soundirq.h"
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#include "lpc2220.h"
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#include "pwm.h"
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#define AUTO_OFF_TIME 0x4000
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@ -37,7 +38,7 @@ unsigned char timeout;
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unsigned int auto_timeout;
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void startSoundIRQ(void)
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{
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{/*
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timeout = 0;
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auto_timeout = 0;
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out1 = 0;
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@ -57,6 +58,7 @@ void startSoundIRQ(void)
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//VICVectCntl0 = VIC_SLOT_EN | INT_SRC_PWM;
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VICIntSelect |= INT_PWM;
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VICIntEnable = INT_PWM;
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*/
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}
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void initSound(void)
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@ -67,12 +69,18 @@ void initSound(void)
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tval = 0;
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last_sample = 0;
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bl_val = 0x3F;
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timeout = 0;
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auto_timeout = 0;
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out1 = 0;
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}
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void switchSound(unsigned char onoff)
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{
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if(onoff)
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{
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PWM_set_frequency(30864);
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sound_shutdown = 0;
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PINSEL0 &= ~(3 << (2 * SND_PWM)); // IO
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PINSEL0 |= (2 << (2 * SND_PWM)); // PWM
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@ -81,6 +89,7 @@ void switchSound(unsigned char onoff)
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FIODIR0 |= (1<<SND_ON) | (1<<SND_EN);
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FIOSET0 = (1<<SND_EN);
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FIOCLR0 = (1<<SND_ON);
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}
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else
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{
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@ -21,6 +21,7 @@
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#include "sound.h"
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#include "sid.h"
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#include "lpc2220.h"
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#include "pwm.h"
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#define AUTO_OFF_TIME 0x4000
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@ -35,20 +36,21 @@ extern volatile char last_sample;
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*/
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unsigned int tval;
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unsigned char bl_val, cmp_val; // backlight PWM
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unsigned int slen;
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unsigned char *sdata;
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unsigned char sact;
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unsigned char out1;
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unsigned char last_sample;
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unsigned char sound_shutdown;
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unsigned char tcount;
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const unsigned char prevvoice[3] = {2,0,1};
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void __attribute__ ((section(".text.fastcode"))) soundIRQ (void)
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{
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PWMIR = 0x01;
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/*
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// play sample
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if(sact != 0)
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{
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@ -76,8 +78,9 @@ void __attribute__ ((section(".text.fastcode"))) soundIRQ (void)
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PWMLER = 0x04;
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}
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}
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// synthesize
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else if(SID.flags & SIDenable)
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else */if(SID.flags & SIDenable)
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{
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unsigned short tempphase;
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unsigned char x;
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@ -211,16 +214,4 @@ void __attribute__ ((section(".text.fastcode"))) soundIRQ (void)
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}
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}
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// backlight pwm
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cmp_val += bl_val;
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if (cmp_val >= 63)
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{
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FIODIR0 |= (1<<4); // sck0/P0.4
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cmp_val -= 63;
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}
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else
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{
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FIODIR0 &= ~(1<<4); // sck0/P0.4
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}
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}
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@ -20,24 +20,31 @@ if { [info exists CPUTAPID ] } {
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}
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#coonfigure reset options
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jtag_nsrst_delay 50
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jtag_ntrst_delay 50
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adapter_nsrst_delay 1
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jtag_ntrst_delay 1
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#use combined on interfaces or targets that can't set TRST/SRST separately
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reset_config trst_and_srst srst_pulls_trst trst_push_pull srst_push_pull
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reset_config srst_only srst_pulls_trst trst_push_pull srst_push_pull
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jtag_khz 1000
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adapter_khz 1000
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#jtag scan chain
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
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target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
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# Event handlers
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$_TARGETNAME configure -event reset-start {jtag_khz 1000}
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$_TARGETNAME configure -event reset-start {adapter_khz 1000}
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$_TARGETNAME configure -event reset-init {betty_init}
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$_TARGETNAME configure -event gdb-attach {
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halt
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}
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$_TARGETNAME configure -event gdb-attach {
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reset init
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}
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arm7_9 dcc_downloads enable
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$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x10000 -work-area-backup 0
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@ -45,7 +52,7 @@ $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x10000 -work-
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#flash bank <name> <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME cfi 0x80000000 0x00100000 2 2 $_TARGETNAME
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flash bank $_FLASHNAME cfi 0x82000000 0x00100000 2 2 $_TARGETNAME
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#flash bank $_FLASHNAME cfi 0x82000000 0x00100000 2 2 $_TARGETNAME
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arm7_9 fast_memory_access enable
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@ -58,18 +65,18 @@ proc betty_init { } {
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# PLLCFG: 0x42 = psel = 10 (4) = msel= 00010 (3) = 240 mhz Fcco*/
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mww 0xe01fc084 0x42
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# Activate PLL settings
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#mww 0xe01fc08c 0xaa
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#mww 0xe01fc08c 0x55
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mww 0xe01fc08c 0xaa
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mww 0xe01fc08c 0x55
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#sleep 100
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# Memory Bank Configuration
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# BCFG0: 16bit, rble, 2wst - 30 mhz : Betty: FLASH 0 @ 0x80000000
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mww 0xffe00000 0x10000420
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mww 0xffe00000 0x10001CA0
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# BCFG2: 16bit, rble, 2wst - 30 mhz : Betty: FLASH 1 @ 0x82000000
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mww 0xffe00008 0x10000420
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mww 0xffe00008 0x10001CA0
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# BCFG1: 8 bit, 3 sram wst, rble, 5 wst 3 idcy : Betty: LCD @ 0x81000000
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#mww 0xffe00004 0x00000400
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mww 0xffe00004 0x00000400
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# GPIO Pin COnfiguration for Flash access
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# PINSEL0:
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@ -88,16 +95,21 @@ proc betty_init { } {
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mww 0xe0028008 0x002018D0
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# disable watchdog
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#mww 0xfffffd44 0x00008000
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mww 0xfffffd44 0x00008000
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# enable user reset
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#mww 0xfffffd08 0xa5000001
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mww 0xfffffd08 0xa5000001
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}
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proc flash_boop {IMAGE} {
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reset init
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flash erase_sector 0 0 0
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flash erase_check 0
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flash erase_sector 0 0 last
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flash write_bank 0 $IMAGE 0
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reset run
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flash erase_check 0
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flash write_bank 0 $IMAGE 0
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reset run
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}
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proc start_debug {} {
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|
|
47
boop/betty.gdbinit
Normal file
47
boop/betty.gdbinit
Normal file
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@ -0,0 +1,47 @@
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monitor reset 100
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monitor halt
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monitor endian little
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# BCFG0: 16bit, rble, 6wst - 60 mhz : Betty: FLASH 0 @ 0x80000000
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monitor memU32 0xFFE00000 = 0x100004A0
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#BCFG2: 16bit, rble, 6wst - 60 mhz : Betty: FLASH 1 @ 0x82000000
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monitor memU32 0xFFE00008 = 0x100004A0
|
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|
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#PINSEL0
|
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monitor memU32 0xE002C000 = 0x00008005
|
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|
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#PINSEL1
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monitor memU32 0xE002C004 = 0x00000000
|
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|
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#PINSEL2
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monitor memU32 0xE002C014 = 0x0de049d4
|
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|
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#IO2SET
|
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monitor memU32 0xE0028024 = 0x1FC0000
|
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|
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#IO2DIR
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monitor memU32 0xe0028028 = 0x1FC0000
|
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|
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#IO0DIR
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monitor memU32 0xE0028008 = 0x002018D0
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|
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#PLLCON: Enable PLL, connect PLL
|
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monitor memU32 0xe01fc080 = 0xe01fc000
|
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|
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# VBPDIV:
|
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monitor memU32 0xe01fc100 = 0x00000000
|
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|
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#PLLCFG:
|
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monitor memU32 0xe01fc084 = 0x00000045
|
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|
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#Activate PLL settings
|
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monitor memU32 0xe01fc08c = 0xaa
|
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monitor memU32 0xe01fc08c = 0x55
|
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|
||||
|
||||
# Enable Flash Breakpoints and Download
|
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monitor WorkRAM = 0x40000000 - 0x2000FBFF
|
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monitor flash CFI = 0x80000000 - 0x800FFFFF
|
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monitor flash breakpoints = 1
|
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monitor flash download = 1
|
Binary file not shown.
|
@ -176,6 +176,8 @@ unsigned char cc1100_write(unsigned char addr,unsigned char* data, unsigned char
|
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unsigned short i;
|
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unsigned char status;
|
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unsigned char x;
|
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|
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(void)(x);
|
||||
|
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FIOCLR0 = CS1;
|
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while (FIOPIN0 & MISO1);
|
||||
|
@ -197,8 +199,10 @@ unsigned char cc1100_write(unsigned char addr,unsigned char* data, unsigned char
|
|||
unsigned char cc1100_write1(unsigned char addr,unsigned char data) {
|
||||
|
||||
unsigned char status;
|
||||
unsigned char x;
|
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volatile unsigned char x=0;
|
||||
|
||||
(void)(x);
|
||||
|
||||
FIOCLR0 = CS1;
|
||||
while (FIOPIN0 & MISO1);
|
||||
SSPDR = (addr | WRITE);
|
||||
|
|
|
@ -51,7 +51,7 @@ void fs20_decoder(void) {
|
|||
unsigned char FS20inbit = 0;
|
||||
unsigned char FS20protocol = PROTOCOL_UNKNOWN;
|
||||
unsigned short tempbyte = 0;
|
||||
unsigned char finish = 0;
|
||||
// unsigned char finish = 0;
|
||||
|
||||
unsigned long pulse = 0;
|
||||
unsigned long space = 0;
|
||||
|
@ -77,7 +77,7 @@ void fs20_decoder(void) {
|
|||
cc1100_strobe(SRX);
|
||||
|
||||
serial_puts("\n\r");
|
||||
|
||||
|
||||
while(KEY_Exit) {};
|
||||
while(!KEY_Exit)
|
||||
{
|
||||
|
@ -188,7 +188,7 @@ void fs20_decoder(void) {
|
|||
}
|
||||
|
||||
if(FS20protocol == PROTOCOL_WEATHER) {
|
||||
if(FS20_BETWEEN(pulse, 685, 1020) && FS20_BETWEEN(space, 200, 533))
|
||||
if(FS20_BETWEEN(pulse, 685, 1020) && FS20_BETWEEN(space, 200, 533))
|
||||
FS20inbit = 0;
|
||||
else if(FS20_BETWEEN(pulse, 200, 533) && FS20_BETWEEN(space, 685, 1020))
|
||||
FS20inbit = (1<<3);
|
||||
|
@ -215,7 +215,9 @@ void fs20_decoder(void) {
|
|||
FS20bitcounter = 0;
|
||||
}
|
||||
else {
|
||||
tempbyte = (tempbyte>>=1) | FS20inbit;
|
||||
//tempbyte = (tempbyte>>=1) | FS20inbit;
|
||||
tempbyte>>=1;
|
||||
tempbyte |= FS20inbit;
|
||||
if(FS20bitcounter++ == 8) {
|
||||
FS20inbyte[FS20bytecounter] = tempbyte;
|
||||
tempbyte = 0;
|
||||
|
@ -263,9 +265,7 @@ void fs20_decoder(void) {
|
|||
FS20bytecounter++;
|
||||
FS20parity = 0;
|
||||
if(FS20bytecounter == 0x0a) { //packet full received
|
||||
unsigned char dec[8];
|
||||
|
||||
dec[0] = FS20inbyte[1] ^ 0x89;
|
||||
for(x=9;x>1;x--) {
|
||||
FS20inbyte[x] = (FS20inbyte[x-1] + 0x24) ^ FS20inbyte[x];
|
||||
}
|
||||
|
@ -329,7 +329,7 @@ void fs20_decoder(void) {
|
|||
}
|
||||
|
||||
serial_puts("\n\r");
|
||||
finish = 0;
|
||||
//finish = 0;
|
||||
FS20bytecounter = 0;
|
||||
FS20protocol = PROTOCOL_UNKNOWN;
|
||||
}
|
||||
|
|
|
@ -413,7 +413,7 @@ void startRFIRQ(void) {
|
|||
VICIntEnable = INT_EINT0;
|
||||
}
|
||||
|
||||
inline void stopRFIRQ(void) {
|
||||
void stopRFIRQ(void) {
|
||||
VICIntEnClr = INT_EINT0;
|
||||
}
|
||||
|
||||
|
|
|
@ -182,7 +182,7 @@ Reset_Handler:
|
|||
/* --+--+-+-+-+-+--------+-----+-------+-+---- */
|
||||
/* ldr r1, =0x10000400 /* 00|01|0|0|0|0|00000000|00000|1|00000|0|0000 16bit, rble, 3wst - 10 mhz*/
|
||||
/* ldr r1, =0x10000420 /* 00|01|0|0|0|0|00000000|00000|1|00001|0|0000 16bit, rble, 4wst - 30 mhz*/
|
||||
ldr r1, =0x100004A0 /* 00|01|0|0|0|0|00000000|00000|1|00101|0|0000 16bit, rble, 6wst - 60 mhz*/
|
||||
ldr r1, =0x10001CA0 /* 00|01|0|0|0|0|00000000|00101|1|00101|0|0000 16bit, rble, 6wst - 60 mhz*/
|
||||
|
||||
str r1,[r0] /* set bcfg0 (flash) */
|
||||
str r1,[r0,#0x08] /* set bcfg2 (flash) */
|
||||
|
|
|
@ -372,8 +372,9 @@ void __attribute__ ((section (".text.fastcode"))) _do_rcuAlpha (
|
|||
void __attribute__ ((section (".text.fastcode"))) _do_rcuS (
|
||||
unsigned char x, unsigned char y, unsigned char m)
|
||||
{
|
||||
unsigned char q;
|
||||
volatile unsigned char q=0;
|
||||
|
||||
(void)(q);
|
||||
|
||||
if((x > BORDER_RIGHT))// | (x < BORDER_LEFT))
|
||||
return;
|
||||
|
@ -429,7 +430,7 @@ void __attribute__ ((section (".text.fastcode"))) _do_rcuS (
|
|||
void __attribute__ ((section(".text.fastcode"))) _draw_block(unsigned char x, unsigned char y, unsigned char w, unsigned char h, unsigned char c, unsigned char m)
|
||||
{
|
||||
unsigned char q,s;
|
||||
unsigned char yy,ss,vv,ww,xx;
|
||||
unsigned char yy,vv,ww,xx;
|
||||
unsigned char segm;
|
||||
is_drawing++;
|
||||
|
||||
|
@ -441,7 +442,6 @@ void __attribute__ ((section(".text.fastcode"))) _draw_block(unsigned char x, un
|
|||
if(h)
|
||||
{
|
||||
yy = h;
|
||||
ss = y >> 3;
|
||||
vv = y & 0x07;
|
||||
|
||||
ww = yy & 0x07;
|
||||
|
@ -555,7 +555,7 @@ void __attribute__ ((section(".text.fastcode"))) _draw_hline(unsigned char x, un
|
|||
void __attribute__ ((section(".text.fastcode"))) _draw_vline(unsigned char x, unsigned char y, unsigned char l, unsigned char c, unsigned char m)
|
||||
{
|
||||
unsigned char s;
|
||||
unsigned char yy,ss,vv,ww,xx;
|
||||
unsigned char yy,vv,ww,xx;
|
||||
unsigned char segm;
|
||||
is_drawing++;
|
||||
|
||||
|
@ -567,7 +567,6 @@ void __attribute__ ((section(".text.fastcode"))) _draw_vline(unsigned char x, un
|
|||
|
||||
|
||||
yy = l;
|
||||
ss = y >> 3;
|
||||
vv = y & 0x07;
|
||||
|
||||
ww = yy & 0x07;
|
||||
|
|
|
@ -672,13 +672,13 @@ unsigned char readByte(unsigned long ByteAddr)
|
|||
unsigned short readWord(unsigned long WordAddr)
|
||||
{
|
||||
//addr = unsigned short address
|
||||
int Offset;
|
||||
//int Offset;
|
||||
unsigned short Word;
|
||||
|
||||
//ASSERT((WordAddr * 2) >= FLASH1_BASE);
|
||||
//ASSERT((WordAddr * 2) < (FLASH1_BASE + FLASH_SIZE));
|
||||
|
||||
Offset = (WordAddr * 2) - FLASH1_BASE;
|
||||
//Offset = (WordAddr * 2) - FLASH1_BASE;
|
||||
|
||||
Word = *((unsigned short *)(WordAddr<<1));
|
||||
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
#include "ir_selector.h"
|
||||
#include "infrared.h"
|
||||
#include "sid.h"
|
||||
#include "sidfiles.h"
|
||||
#include "timerfuncs.h"
|
||||
#include "sound.h"
|
||||
#include "lpc2220.h"
|
||||
|
@ -907,10 +908,8 @@ void test_irrec(void) {
|
|||
}
|
||||
|
||||
void erase_flash1(void)
|
||||
{ int x;
|
||||
|
||||
x = eraseFlash(1);
|
||||
|
||||
{
|
||||
eraseFlash(1);
|
||||
}
|
||||
|
||||
void test_sid(void) {
|
||||
|
@ -936,6 +935,9 @@ void test_sid(void) {
|
|||
draw_string (0, 95, "color keys", LCD_COLOR_B, DRAW_PUT);
|
||||
draw_string (0, 104, "set waveform", LCD_COLOR_B, DRAW_PUT);
|
||||
|
||||
draw_string (0, 120, "Mute", LCD_COLOR_B, DRAW_PUT);
|
||||
draw_string (0, 129, "Raiders March", LCD_COLOR_B, DRAW_PUT);
|
||||
|
||||
sysInfo |= SYS_IR;
|
||||
SID.noise = 0xaa;
|
||||
playstate = 0x00;
|
||||
|
@ -1054,6 +1056,20 @@ void test_sid(void) {
|
|||
playtone_cb = addTimerCB(SIDplaytone, 4);
|
||||
startCB(playtone_cb);
|
||||
}
|
||||
} else if (KEY_Mute)
|
||||
{
|
||||
if (playstate == 0)
|
||||
{
|
||||
playstate = 1;
|
||||
|
||||
playtone[0] = (unsigned char*)&song1[0];
|
||||
|
||||
playcounter = 0;
|
||||
playcountermax = sizeof(song1)/14;
|
||||
|
||||
playtone_cb = addTimerCB(SIDplaydump, 4);
|
||||
startCB(playtone_cb);
|
||||
}
|
||||
}
|
||||
} while (!KEY_Exit);
|
||||
sysInfo &= ~SYS_IR;
|
||||
|
@ -1062,8 +1078,7 @@ void test_sid(void) {
|
|||
}
|
||||
|
||||
void test_click(FORM* form, CONTROL* control) {
|
||||
unsigned char x;
|
||||
x=msgbox(45,BC_OKOnly | BC_DefaultButton1,control->caption);
|
||||
msgbox(45,BC_OKOnly | BC_DefaultButton1,control->caption);
|
||||
form_draw(form);
|
||||
}
|
||||
|
||||
|
@ -1076,8 +1091,7 @@ void test3_click(FORM* form, CONTROL* control) {
|
|||
}
|
||||
|
||||
void test_numbox(FORM* form, CONTROL* control) {
|
||||
unsigned char x;
|
||||
x=msgbox(30,BC_OKOnly | BC_DefaultButton1,"numbox click");
|
||||
msgbox(30,BC_OKOnly | BC_DefaultButton1,"numbox click");
|
||||
form_draw(form);
|
||||
}
|
||||
|
||||
|
@ -1091,14 +1105,12 @@ void test_numchange(FORM* form, CONTROL* control) {
|
|||
}
|
||||
|
||||
void test_change(FORM* form, CONTROL* control) {
|
||||
unsigned short x;
|
||||
x=msgbox(30,BC_OKOnly | BC_DefaultButton1,"geaendert");
|
||||
msgbox(30,BC_OKOnly | BC_DefaultButton1,"geaendert");
|
||||
form_draw(form);
|
||||
}
|
||||
|
||||
void formload (FORM* form)
|
||||
{
|
||||
unsigned char x;
|
||||
struct RFendpoint_* cur_ep;
|
||||
|
||||
cur_ep = openEP(&(form->controls[7])->tag1, 1, packet_RFenc);
|
||||
|
@ -1110,12 +1122,11 @@ void formload (FORM* form)
|
|||
RF_changestate(RFrx);
|
||||
}
|
||||
|
||||
x=msgbox(50,BC_OKOnly | BC_DefaultButton1,"Form open");
|
||||
msgbox(50,BC_OKOnly | BC_DefaultButton1,"Form open");
|
||||
}
|
||||
|
||||
void formclose (FORM* form)
|
||||
{
|
||||
unsigned char x;
|
||||
|
||||
if (form->tag)
|
||||
{
|
||||
|
@ -1123,7 +1134,7 @@ void formclose (FORM* form)
|
|||
RF_changestate(RFwor);
|
||||
}
|
||||
|
||||
x=msgbox(50,BC_OKOnly | BC_DefaultButton1,"Form close");
|
||||
msgbox(50,BC_OKOnly | BC_DefaultButton1,"Form close");
|
||||
|
||||
}
|
||||
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
THUMBSRCS := infrared.c codes.c encoders.c ir_capture.c ir_selector.c
|
||||
SRCS := infraredirq.c
|
||||
THUMBSRCS := infrared.c codes.c encoders.c ir_capture.c ir_selector.c
|
||||
SRCS := infraredirq.c pwm.c
|
||||
THUMBSRCSUNOPT := ir_itt.c ir_nrc17.c \
|
||||
ir_raw.c ir_rc5.c ir_rc6.c ir_rca.c ir_rcmm.c ir_rec80.c ir_recs80.c ir_rf.c \
|
||||
ir_sirc.c ir_spaceenc.c ir_lirc.c
|
||||
|
|
|
@ -222,7 +222,7 @@ const struct TABLES_N RAW =
|
|||
|
||||
const struct TABLES_L LIRC =
|
||||
{
|
||||
9,
|
||||
10,
|
||||
{
|
||||
{
|
||||
#include "ir_codes/lirc/ufs922"
|
||||
|
@ -259,6 +259,10 @@ const struct TABLES_L LIRC =
|
|||
{
|
||||
#include "ir_codes/lirc/samsung_ue46b6000"
|
||||
"Samsung TV"
|
||||
}
|
||||
},
|
||||
{
|
||||
#include "ir_codes/lirc/beo4"
|
||||
"bang & olufsen"
|
||||
}
|
||||
}
|
||||
};
|
||||
|
|
|
@ -25,6 +25,7 @@
|
|||
#include "encoders.h"
|
||||
#include "codes.h"
|
||||
#include "ir_selector.h"
|
||||
#include "pwm.h"
|
||||
|
||||
volatile unsigned char mod_enable;
|
||||
volatile unsigned char hi_border;
|
||||
|
@ -61,9 +62,9 @@ void startIrIRQ(void)
|
|||
// T1PR = 0x01;
|
||||
T1MCR = 0x03;
|
||||
|
||||
//VICVectAddr1 = (unsigned long)&(irIRQ);
|
||||
//VICVectCntl1 = VIC_SLOT_EN | INT_SRC_TIMER1;
|
||||
VICIntSelect |= INT_TIMER1;
|
||||
VICVectAddr1 = (unsigned long)&(irIRQ);
|
||||
VICVectCntl1 = VIC_SLOT_EN | INT_SRC_TIMER1;
|
||||
//VICIntSelect |= INT_TIMER1;
|
||||
VICIntEnable = INT_TIMER1;
|
||||
}
|
||||
|
||||
|
@ -109,11 +110,21 @@ void defStopper(void)
|
|||
void runIR(void)
|
||||
{
|
||||
T1TCR = 0x01;
|
||||
PWM_set_IR_duty_cycle(0);
|
||||
|
||||
}
|
||||
|
||||
void setIRspeed(struct irModule module)
|
||||
{
|
||||
PWM_set_frequency(15000000 / (module.tval * module.lo_border));
|
||||
ir.duty_cycle =(module.hi_border * 100) / module.lo_border;
|
||||
}
|
||||
|
||||
void stopIR(void)
|
||||
{
|
||||
T1TCR = 0x03;
|
||||
PWM_set_IR_duty_cycle(0);
|
||||
|
||||
}
|
||||
|
||||
void copyMapC(unsigned char *map)
|
||||
|
|
|
@ -63,28 +63,8 @@ struct IR_VARS_ {
|
|||
unsigned long actpre_data;
|
||||
unsigned long post_data; // data which the remote sends after actual keycode
|
||||
unsigned long actpost_data;
|
||||
unsigned short flags; // flags
|
||||
unsigned short phead,shead; // header
|
||||
unsigned short plead; // leading pulse
|
||||
unsigned short ptrail; // trailing pulse
|
||||
unsigned short pfoot,sfoot; // foot
|
||||
unsigned short pre_p,pre_s; // signal between pre_data and keycode
|
||||
unsigned short post_p,post_s; // signal between keycode and post_code
|
||||
unsigned short gap;
|
||||
unsigned short repeat_gap;
|
||||
unsigned short prepeat,srepeat;
|
||||
unsigned short cycles_counter;
|
||||
unsigned char bits; // bits (length of code)
|
||||
unsigned char pre_data_bits; // length of pre_data
|
||||
unsigned char post_data_bits; // length of post_data
|
||||
unsigned char rc6_bit; // doubles signal length of this bit (only used for RC-6)
|
||||
unsigned char pthree,sthree; // 3 (only used for RC-MM)
|
||||
unsigned char ptwo,stwo; // 2 (only used for RC-MM)
|
||||
unsigned char pone,sone; // 1
|
||||
unsigned char pzero,szero; // 0
|
||||
unsigned char min_repeat;
|
||||
unsigned long cycles_counter;
|
||||
unsigned char bit;
|
||||
unsigned char map;
|
||||
unsigned char stop;
|
||||
unsigned char repeats;
|
||||
} lirc;
|
||||
|
@ -93,11 +73,12 @@ struct IR_VARS_ {
|
|||
unsigned int actcmd;
|
||||
unsigned char toggle;
|
||||
unsigned char state;
|
||||
unsigned char duty_cycle;
|
||||
} ir;
|
||||
|
||||
|
||||
//#define setIRspeed( _m ) { if(sysInfo & 0x80) T1MR0 = _m.tval1; else T1MR0 = _m.tval; }
|
||||
#define setIRspeed( _m ) { T1MR0 = _m.tval; }
|
||||
//#define setIRspeed( _m ) { T1MR0 = _m.tval; }
|
||||
|
||||
void __attribute__ ((section(".text.fastcode"))) defIR(void);
|
||||
void defSender(unsigned long cmd);
|
||||
|
@ -109,6 +90,7 @@ void startIrIRQ(void);
|
|||
void setIR(struct irModule module);
|
||||
void runIR(void);
|
||||
void stopIR(void);
|
||||
void setIRspeed(struct irModule module);
|
||||
|
||||
unsigned long setEncoder( unsigned char _x, unsigned char _y );
|
||||
|
||||
|
|
|
@ -23,9 +23,8 @@
|
|||
#include "keyboard.h"
|
||||
#include "rf.h"
|
||||
#include "cc1100.h"
|
||||
#include "pwm.h"
|
||||
|
||||
static unsigned int c_cnt = 0;
|
||||
static unsigned int b_len = 0;
|
||||
extern volatile unsigned char mod_enable;
|
||||
extern volatile unsigned char hi_border;
|
||||
extern volatile unsigned char lo_border;
|
||||
|
@ -35,33 +34,15 @@ extern ir_fn irEncoder;
|
|||
|
||||
void __attribute__ ((section(".text.fastcode"))) irIRQ(void)
|
||||
{
|
||||
c_cnt++;
|
||||
if(c_cnt <= hi_border)
|
||||
{
|
||||
FIOSET0 = (mod_enable<<21);
|
||||
}
|
||||
else
|
||||
{
|
||||
FIOCLR0 = (1<<21);
|
||||
if(c_cnt >= lo_border)
|
||||
{
|
||||
c_cnt = 0;
|
||||
b_len++;
|
||||
if(b_len >= cycles)
|
||||
{
|
||||
irEncoder();
|
||||
b_len = 0;
|
||||
|
||||
if(!hi_border) { //RF mode
|
||||
if(mod_enable)
|
||||
FIOCLR0 = GDO0;
|
||||
else
|
||||
FIOSET0 = GDO0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
irEncoder();
|
||||
|
||||
if(mod_enable) {
|
||||
PWM_set_IR_duty_cycle(ir.duty_cycle);
|
||||
} else {
|
||||
PWM_set_IR_duty_cycle(0);
|
||||
}
|
||||
|
||||
T1IR = 1;
|
||||
// VICVectAddr = 0;
|
||||
|
||||
}
|
||||
|
|
1
boop/infrared/ir_codes/lirc/beo4
Normal file
1
boop/infrared/ir_codes/lirc/beo4
Normal file
|
@ -0,0 +1 @@
|
|||
/*
infrared codes for bang & olufsen
Copyright (C) 2017 <kölnsolar>
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*pre_data*/ 0x00000000, // 2. start bit
/*post_data*/ 0x00000000,
/*toggle_bit_mask*/ 0x00,
/*gap*/ 18000, // final gap to prevent collision
/*repeat_gap*/ 0,
/*bits*/ 17, // last(4.) start bit logical low as first data bit ==> 1+16 data bits = 17
/*pre_data_bits*/ 1, // 2. start bit
/*post_data_bits*/ 0,
/*rc6_bit*/ 0,
/*frequency*/ 455000, // regular freq is 455kHz but to get a valid result 454,5 is used
/*flags*/ LIRC_BO,
/*header*/ 200,3125, // 1. start bit
/*three*/ 0,0,
/*two*/ 0,0,
/*one*/ 200,9375,
/*zero*/ 200,3125,
/*plead*/ 0,
/*ptrail*/ 200, // stop bit
/*foot*/ 0,0,
/*pre*/ 200,15625, //3. start bit
/*post*/ 200,12500, // post bit
/*repeat*/ 0,0,
/*min_repeat*/ 0,
/*duty cycle*/ 30,
{
0x0000, // A ->
0x0000, // B ->
0x0000, // C ->
0x0000, // D ->
0x0000, // Betty ->
0xB44B, // Exit -> Exit
0x06F9, // Up -> UP
0x8679, // Down -> Down
0xA659, // Left -> Left
0x46B9, // Right -> Right
0x16E9, // OK -> OK
0x0160, // Vol+ -> Vol+
0x0164, // Vol- -> Vol-
0xF00F, // Mute -> Mute
0x48B7, // Prog+ -> Prog+
0x48B7, // Prog- -> Prog-
0x0101, // 1 -> 1
0x0102, // 2 -> 2
0x609F, // 3 -> 3
0x10EF, // 4 -> 4
0x906F, // 5 -> 5
0x50AF, // 6 -> 6
0x30CF, // 7 -> 7
0xB04F, // 8 -> 8
0x708F, // 9 -> 9
0x8877, // 0 -> 0
0xF20D, // -/-- -> Guide
0x0181, // AV -> Source
0x0f0c, // Menu -> Menue
0xD22D, // PiP -> Tools
0x1AE5, // A/B -> Return
0x7C83, // 16:9 -> P.Size
0xF807, // Info -> Info
0xD629, // VTX1 -> Ch.List
0x0000, // VTX2 ->
0xC837, // VTX3 -> Pre-CH
0x6897, // Blue -> Blue
0xA857, // Yello -> Yellow
0x28D7, // Green -> Green
0x36C9, // Red -> Red
0xC23D, // TV -> TV/DTV
0x0f0C // Power -> Standby
},
|
|
@ -126,6 +126,7 @@ void __attribute__ ((section(".text.fastcode"))) ITT_Encode (void)
|
|||
}
|
||||
break;
|
||||
}
|
||||
T1MR0 = cycles * ITT2_Module.lo_border * ITT2_Module.tval;
|
||||
}
|
||||
|
||||
void ITT_LoadMap(unsigned char map)
|
||||
|
|
|
@ -25,18 +25,16 @@
|
|||
#include "lcd.h"
|
||||
#include "rf.h"
|
||||
#include "cc1100.h"
|
||||
#include "pwm.h"
|
||||
|
||||
#include "global.h"
|
||||
|
||||
extern volatile unsigned char mod_enable;
|
||||
extern volatile unsigned int cycles;
|
||||
extern volatile unsigned long keyMap[42];
|
||||
|
||||
/*
|
||||
#define RAW_IDLE 0x00
|
||||
#define RAW_HI 0x01
|
||||
#define RAW_LO 0x02
|
||||
*/
|
||||
struct CODE_TABLE_L *lirctable;
|
||||
|
||||
unsigned int prev_cycles; /* needed for handling of b&o specific protocol added MN2017325 */
|
||||
|
||||
#define LIRC_IDLE 0x00
|
||||
#define LIRC_HEAD_P 0x01
|
||||
|
@ -73,7 +71,7 @@ const struct irModule LIRC_Module =
|
|||
|
||||
unsigned char __attribute__ ((section(".text.fastcode"))) send_data (unsigned long data, unsigned char pulse) {
|
||||
|
||||
const unsigned char* bittimes[4] = {&(ir.lirc.pzero), &(ir.lirc.pone), &(ir.lirc.ptwo), &(ir.lirc.pthree)};
|
||||
const unsigned short* bittimes[4] = {&(lirctable->pzero), &(lirctable->pone), &(lirctable->ptwo), &(lirctable->pthree)};
|
||||
unsigned char notpulse = 1;
|
||||
|
||||
if(pulse) {
|
||||
|
@ -112,7 +110,7 @@ unsigned char __attribute__ ((section(".text.fastcode"))) send_data (unsigned lo
|
|||
cycles = bittimes[0][notpulse];
|
||||
mod_enable = pulse;
|
||||
}
|
||||
if((ir.lirc.bit+1 == ir.lirc.rc6_bit))
|
||||
if((ir.lirc.bit+1 == lirctable->rc6_bit))
|
||||
cycles <<= 1;
|
||||
}
|
||||
else {
|
||||
|
@ -132,86 +130,97 @@ unsigned char __attribute__ ((section(".text.fastcode"))) send_data (unsigned lo
|
|||
}
|
||||
|
||||
void __attribute__ ((section(".text.fastcode"))) LIRC_Encode (void) {
|
||||
unsigned short gap;
|
||||
unsigned long gap;
|
||||
|
||||
ir.lirc.cycles_counter += cycles;
|
||||
|
||||
switch(ir.state)
|
||||
{
|
||||
case LIRC_IDLE:
|
||||
cycles = ir.lirc.pone;
|
||||
cycles = lirctable->pone;
|
||||
mod_enable = 0;
|
||||
break;
|
||||
case LIRC_HEAD_P:
|
||||
ir.lirc.cycles_counter = 0;
|
||||
if(has_header && (!ir.lirc.repeats || (!(ir.lirc.flags&LIRC_NO_HEAD_REP) && !has_repeat) || (ir.lirc.flags&LIRC_REPEAT_HEADER))) { //
|
||||
if(has_header && (!ir.lirc.repeats || (!(lirctable->flags&LIRC_NO_HEAD_REP) && !has_repeat) || (lirctable->flags&LIRC_REPEAT_HEADER))) { //
|
||||
mod_enable = 1;
|
||||
cycles = ir.lirc.phead;
|
||||
cycles = lirctable->phead;
|
||||
ir.state++;
|
||||
break;
|
||||
case LIRC_HEAD_S:
|
||||
mod_enable = 0;
|
||||
cycles = ir.lirc.shead;
|
||||
cycles = lirctable->shead;
|
||||
ir.state++;
|
||||
break;
|
||||
}
|
||||
ir.state = LIRC_LEAD_P;
|
||||
case LIRC_LEAD_P:
|
||||
if(ir.lirc.plead) {
|
||||
if(lirctable->plead) {
|
||||
mod_enable = 1;
|
||||
cycles = ir.lirc.plead;
|
||||
cycles = lirctable->plead;
|
||||
ir.state++;
|
||||
break;
|
||||
}
|
||||
ir.state++;
|
||||
case LIRC_PRE_DAT_P:
|
||||
if(!has_repeat || !(ir.lirc.repeats)) {
|
||||
if(ir.lirc.pre_data_bits) {
|
||||
if(lirctable->pre_data_bits) {
|
||||
send_data(ir.lirc.pre_data,1);
|
||||
ir.state++;
|
||||
break;
|
||||
case LIRC_PRE_DAT_S:
|
||||
ir.lirc.pre_data <<= send_data(ir.lirc.pre_data,0);
|
||||
if(ir.lirc.bit >= ir.lirc.pre_data_bits)
|
||||
if(ir.lirc.bit >= lirctable->pre_data_bits)
|
||||
ir.state++;
|
||||
else
|
||||
ir.state--;
|
||||
break;
|
||||
case LIRC_PRE_P:
|
||||
if(ir.lirc.pre_p && ir.lirc.pre_s) {
|
||||
if(lirctable->pre_p && lirctable->pre_s) {
|
||||
mod_enable = 1;
|
||||
cycles = ir.lirc.pre_p;
|
||||
cycles = lirctable->pre_p;
|
||||
ir.state++;
|
||||
break;
|
||||
case LIRC_PRE_S:
|
||||
mod_enable = 0;
|
||||
cycles = ir.lirc.pre_s;
|
||||
cycles = lirctable->pre_s;
|
||||
ir.state++;
|
||||
break;
|
||||
}
|
||||
}
|
||||
ir.state = LIRC_DATA_P;
|
||||
ir.state = LIRC_DATA_P;
|
||||
prev_cycles = 0;
|
||||
case LIRC_DATA_P:
|
||||
send_data(ir.cmd,1);
|
||||
ir.state++;
|
||||
break;
|
||||
case LIRC_DATA_S:
|
||||
ir.cmd <<= send_data(ir.cmd,0);
|
||||
if(ir.lirc.bit >= ir.lirc.pre_data_bits + ir.lirc.bits)
|
||||
/* handling for b&o specific protocol added MN2017325
|
||||
special r-bit coding, if current bit is equal previous bit */
|
||||
if(is_BO) {
|
||||
if (prev_cycles == cycles) {
|
||||
prev_cycles = cycles;
|
||||
cycles = lirctable->szero * 2 ;
|
||||
} else {
|
||||
prev_cycles = cycles;
|
||||
}
|
||||
}
|
||||
if(ir.lirc.bit >= lirctable->pre_data_bits + lirctable->bits)
|
||||
ir.state++;
|
||||
else
|
||||
ir.state--;
|
||||
break;
|
||||
case LIRC_POST_P:
|
||||
if(ir.lirc.post_data_bits) {
|
||||
if(ir.lirc.post_p && ir.lirc.post_s) {
|
||||
if(lirctable->post_data_bits) {
|
||||
if(lirctable->post_p && lirctable->post_s) {
|
||||
mod_enable = 1;
|
||||
cycles = ir.lirc.post_p;
|
||||
cycles = lirctable->post_p;
|
||||
ir.state++;
|
||||
break;
|
||||
case LIRC_POST_S:
|
||||
mod_enable = 0;
|
||||
cycles = ir.lirc.post_s;
|
||||
cycles = lirctable->post_s;
|
||||
ir.state++;
|
||||
break;
|
||||
}
|
||||
|
@ -221,8 +230,8 @@ void __attribute__ ((section(".text.fastcode"))) LIRC_Encode (void) {
|
|||
ir.state++;
|
||||
break;
|
||||
case LIRC_POST_DAT_S:
|
||||
ir.lirc.post_data <<= send_data(ir.lirc.post_data,0);
|
||||
if(ir.lirc.bit >= ir.lirc.pre_data_bits + ir.lirc.bits +ir.lirc.post_data_bits)
|
||||
ir.lirc.post_data <<= send_data(ir.lirc.post_data,0);
|
||||
if(ir.lirc.bit >= lirctable->pre_data_bits + lirctable->bits + lirctable->post_data_bits)
|
||||
ir.state = LIRC_TRAIL_P;
|
||||
else
|
||||
ir.state--;
|
||||
|
@ -233,33 +242,33 @@ void __attribute__ ((section(".text.fastcode"))) LIRC_Encode (void) {
|
|||
case LIRC_REPEAT_P:
|
||||
if(has_repeat && ir.lirc.repeats) {
|
||||
mod_enable = 1;
|
||||
cycles = ir.lirc.prepeat;
|
||||
cycles = lirctable->prepeat;
|
||||
ir.state++;
|
||||
break;
|
||||
case LIRC_REPEAT_S:
|
||||
mod_enable = 0;
|
||||
cycles = ir.lirc.srepeat;
|
||||
cycles = lirctable->srepeat;
|
||||
ir.state++;
|
||||
break;
|
||||
}
|
||||
ir.state = LIRC_TRAIL_P;
|
||||
case LIRC_TRAIL_P:
|
||||
if(ir.lirc.ptrail) {
|
||||
if(lirctable->ptrail) {
|
||||
mod_enable = 1;
|
||||
cycles = ir.lirc.ptrail;
|
||||
cycles = lirctable->ptrail;
|
||||
ir.state++;
|
||||
break;
|
||||
}
|
||||
ir.state++;
|
||||
case LIRC_FOOT_S:
|
||||
if(has_foot && (!ir.lirc.repeats || !(ir.lirc.flags&LIRC_NO_FOOT_REP)) && (!has_repeat || !ir.lirc.repeats)) {
|
||||
if(has_foot && (!ir.lirc.repeats || !(lirctable->flags&LIRC_NO_FOOT_REP)) && (!has_repeat || !ir.lirc.repeats)) {
|
||||
mod_enable = 0;
|
||||
cycles = ir.lirc.sfoot;
|
||||
cycles = lirctable->sfoot;
|
||||
ir.state++;
|
||||
break;
|
||||
case LIRC_FOOT_P:
|
||||
mod_enable = 1;
|
||||
cycles = ir.lirc.pfoot;
|
||||
cycles = lirctable->pfoot;
|
||||
ir.state++;
|
||||
break;
|
||||
}
|
||||
|
@ -271,17 +280,17 @@ void __attribute__ ((section(".text.fastcode"))) LIRC_Encode (void) {
|
|||
ir.lirc.pre_data = ir.lirc.actpre_data;
|
||||
ir.lirc.post_data = ir.lirc.actpost_data;
|
||||
|
||||
if((ir.lirc.repeat_gap && has_repeat && ir.lirc.repeats) | (is_RF && (ir.lirc.repeats >= ir.lirc.min_repeat)))
|
||||
gap = ir.lirc.repeat_gap;
|
||||
if((lirctable->repeat_gap && has_repeat && ir.lirc.repeats) | (is_RF && (ir.lirc.repeats >= lirctable->min_repeat)))
|
||||
gap = lirctable->repeat_gap;
|
||||
else
|
||||
gap = ir.lirc.gap;
|
||||
gap = lirctable->gap;
|
||||
|
||||
if(is_const && (ir.lirc.cycles_counter < gap))
|
||||
cycles = gap - ir.lirc.cycles_counter;
|
||||
else
|
||||
cycles = gap;
|
||||
|
||||
if((ir.lirc.repeats >= ir.lirc.min_repeat) && ir.lirc.stop) {
|
||||
if((ir.lirc.repeats >= lirctable->min_repeat) && ir.lirc.stop) {
|
||||
ir.state = LIRC_IDLE;
|
||||
}
|
||||
else {
|
||||
|
@ -290,12 +299,14 @@ void __attribute__ ((section(".text.fastcode"))) LIRC_Encode (void) {
|
|||
ir.state = LIRC_HEAD_P;
|
||||
}
|
||||
}
|
||||
|
||||
T1MR0 = 15 * cycles;
|
||||
|
||||
}
|
||||
|
||||
void LIRC_Init(unsigned char map)
|
||||
{
|
||||
unsigned long freq;
|
||||
struct CODE_TABLE_L *lirctable;
|
||||
|
||||
if(map < LIRC.num_tables) {
|
||||
|
||||
|
@ -305,90 +316,32 @@ void LIRC_Init(unsigned char map)
|
|||
setIR(LIRC_Module);
|
||||
|
||||
if(lirctable->flags&LIRC_RF) {
|
||||
hi_border = 0;
|
||||
lo_border = 1;
|
||||
ir.duty_cycle = 50;
|
||||
freq = 20000;
|
||||
}
|
||||
else {
|
||||
freq = lirctable->freq;
|
||||
if(!freq)
|
||||
freq = 38000;
|
||||
|
||||
if(lirctable->duty_cycle == 0) { //default 50%
|
||||
hi_border = 1;
|
||||
lo_border = 2;
|
||||
}
|
||||
else if(lirctable->duty_cycle <= 25) {
|
||||
hi_border = 1;
|
||||
lo_border = 4;
|
||||
}
|
||||
else if(lirctable->duty_cycle <= 33) {
|
||||
hi_border = 1;
|
||||
lo_border = 3;
|
||||
}
|
||||
else if(lirctable->duty_cycle <= 50) {
|
||||
hi_border = 1;
|
||||
lo_border = 2;
|
||||
}
|
||||
else if(lirctable->duty_cycle <= 66) {
|
||||
hi_border = 2;
|
||||
lo_border = 3;
|
||||
}
|
||||
else { //75%
|
||||
hi_border = 3;
|
||||
lo_border = 4;
|
||||
|
||||
ir.duty_cycle = lirctable->duty_cycle;
|
||||
if(!lirctable->duty_cycle) { //default 50%
|
||||
ir.duty_cycle = 50;
|
||||
}
|
||||
}
|
||||
|
||||
T1MR0 = 15000000 / (freq * lo_border);
|
||||
PWM_set_frequency(freq);
|
||||
|
||||
T1MR0 = 15000000 / (freq);
|
||||
|
||||
|
||||
ir.lirc.phead = (lirctable->phead * freq) / 1000000;
|
||||
ir.lirc.shead = (lirctable->shead * freq) / 1000000;
|
||||
|
||||
ir.lirc.plead = (lirctable->plead * freq) / 1000000;
|
||||
|
||||
ir.lirc.actpre_data = (lirctable->pre_data)<<(32-lirctable->pre_data_bits);
|
||||
ir.lirc.pre_data_bits = lirctable->pre_data_bits;
|
||||
ir.lirc.pre_p = (lirctable->pre_p * freq) / 1000000;
|
||||
ir.lirc.pre_s = (lirctable->pre_s * freq) / 1000000;
|
||||
|
||||
ir.lirc.post_p = (lirctable->post_p * freq) / 1000000;
|
||||
ir.lirc.post_s = (lirctable->post_s * freq) / 1000000;
|
||||
ir.lirc.actpost_data = (lirctable->post_data)<<(32-lirctable->post_data_bits);
|
||||
ir.lirc.post_data_bits = lirctable->post_data_bits;
|
||||
|
||||
ir.lirc.ptrail = (lirctable->ptrail * freq) / 1000000;
|
||||
|
||||
ir.lirc.pfoot = (lirctable->pfoot * freq) / 1000000;
|
||||
ir.lirc.sfoot = (lirctable->sfoot * freq) / 1000000;
|
||||
|
||||
ir.lirc.prepeat = (lirctable->prepeat * freq) / 1000000;
|
||||
ir.lirc.srepeat = (lirctable->srepeat * freq) / 1000000;
|
||||
|
||||
ir.lirc.pzero = (lirctable->pzero * freq) / 1000000;
|
||||
ir.lirc.szero = (lirctable->szero * freq) / 1000000;
|
||||
ir.lirc.pone = (lirctable->pone * freq) / 1000000;
|
||||
ir.lirc.sone = (lirctable->sone * freq) / 1000000;
|
||||
ir.lirc.ptwo = (lirctable->ptwo * freq) / 1000000;
|
||||
ir.lirc.stwo = (lirctable->stwo * freq) / 1000000;
|
||||
ir.lirc.pthree = (lirctable->pthree * freq) / 1000000;
|
||||
ir.lirc.sthree = (lirctable->sthree * freq) / 1000000;
|
||||
|
||||
ir.lirc.gap = (lirctable->gap * freq) / 1000000;
|
||||
ir.lirc.repeat_gap = (lirctable->repeat_gap * freq) / 1000000;
|
||||
|
||||
ir.lirc.rc6_bit = lirctable->rc6_bit;
|
||||
ir.lirc.flags = lirctable->flags;
|
||||
ir.lirc.bits = lirctable->bits;
|
||||
ir.lirc.min_repeat = lirctable->min_repeat;
|
||||
|
||||
|
||||
ir.cmd = 0;
|
||||
ir.actcmd = 0;
|
||||
ir.lirc.stop = 0;
|
||||
ir.state = LIRC_IDLE;
|
||||
ir.lirc.bit = 0;
|
||||
ir.lirc.map = map;
|
||||
|
||||
}
|
||||
}
|
||||
|
@ -399,19 +352,19 @@ void LIRC_Send(unsigned long cmd)
|
|||
if(cmd != 0x0000) {
|
||||
|
||||
ir.lirc.pre_data = ir.lirc.actpre_data;
|
||||
ir.actcmd = cmd<<(32-ir.lirc.bits);
|
||||
ir.actcmd = cmd<<(32-lirctable->bits);
|
||||
ir.lirc.post_data = ir.lirc.actpost_data;
|
||||
ir.lirc.stop = 0;
|
||||
ir.lirc.repeats = 0;
|
||||
|
||||
if(ir.toggle & 0x01) {
|
||||
togglemask = (unsigned long)(LIRC.table[ir.lirc.map].toggle_bit_mask) << (32-ir.lirc.post_data_bits);
|
||||
togglemask = (unsigned long)(lirctable->toggle_bit_mask) << (32-lirctable->post_data_bits);
|
||||
ir.lirc.post_data ^= togglemask;
|
||||
|
||||
togglemask = (unsigned long)(LIRC.table[ir.lirc.map].toggle_bit_mask>>ir.lirc.post_data_bits) << (32-ir.lirc.bits);
|
||||
togglemask = (unsigned long)(lirctable->toggle_bit_mask>>lirctable->post_data_bits) << (32-lirctable->bits);
|
||||
ir.actcmd ^= togglemask;
|
||||
|
||||
togglemask = (unsigned long)(LIRC.table[ir.lirc.map].toggle_bit_mask>>(ir.lirc.post_data_bits + ir.lirc.bits)) << (32-ir.lirc.pre_data_bits);
|
||||
togglemask = (unsigned long)(lirctable->toggle_bit_mask>>(lirctable->post_data_bits + lirctable->bits)) << (32-lirctable->pre_data_bits);
|
||||
ir.lirc.pre_data ^= togglemask;
|
||||
}
|
||||
|
||||
|
@ -421,9 +374,9 @@ void LIRC_Send(unsigned long cmd)
|
|||
ir.state++;
|
||||
if(is_RF) {
|
||||
RFasyncmode(true);
|
||||
cc1100_write1(FREQ2,((LIRC.table[ir.lirc.map].freq)>>16) & 0xFF);
|
||||
cc1100_write1(FREQ1,((LIRC.table[ir.lirc.map].freq)>>8) & 0xFF);
|
||||
cc1100_write1(FREQ0,(LIRC.table[ir.lirc.map].freq) & 0xFF);
|
||||
cc1100_write1(FREQ2,((lirctable->freq)>>16) & 0xFF);
|
||||
cc1100_write1(FREQ1,((lirctable->freq)>>8) & 0xFF);
|
||||
cc1100_write1(FREQ0,(lirctable->freq) & 0xFF);
|
||||
cc1100_strobe(STX);
|
||||
}
|
||||
runIR();
|
||||
|
@ -438,7 +391,7 @@ void LIRC_Repeat(void) {
|
|||
void LIRC_Stop(void)
|
||||
{
|
||||
ir.lirc.stop = 1;
|
||||
if(ir.lirc.bits){
|
||||
if(lirctable->bits){
|
||||
while(ir.state != LIRC_IDLE);
|
||||
}
|
||||
|
||||
|
|
|
@ -28,10 +28,10 @@
|
|||
//#define LIRC_SPACE_FIRST 0x0020 /* bits are encoded as space+pulse */
|
||||
//#define LIRC_GOLDSTAR 0x0040 /* encoding found on Goldstar remote */
|
||||
//#define LIRC_GRUNDIG 0x0080 /* encoding found on Grundig remote */
|
||||
//#define LIRC_BO 0x0100 /* encoding found on Bang & Olufsen remote */
|
||||
#define LIRC_RF 0x0100 /* RF ASK/OOK modulator */
|
||||
//#define LIRC_SERIAL 0x0200 /* serial protocol */
|
||||
//#define LIRC_XMP 0x0400 /* XMP protocol */
|
||||
#define LIRC_BO 0x0100 /* encoding found on Bang & Olufsen remote */
|
||||
#define LIRC_RF 0x0200 /* RF ASK/OOK modulator */
|
||||
//#define LIRC_SERIAL 0x0400 /* serial protocol */
|
||||
//#define LIRC_XMP 0x0800 /* XMP protocol */
|
||||
|
||||
/* additinal flags: can be orred together with protocol flag */
|
||||
//#define REVERSE 0x0800
|
||||
|
@ -40,14 +40,15 @@
|
|||
#define LIRC_CONST_LENGTH 0x4000 /* signal length+gap is always constant */
|
||||
#define LIRC_REPEAT_HEADER 0x8000 /* header is also sent before repeat code */
|
||||
|
||||
#define is_rc6 (ir.lirc.flags & LIRC_RC6)
|
||||
#define is_biphase ((ir.lirc.flags & LIRC_RC5) || is_rc6)
|
||||
#define is_rcmm (ir.lirc.flags & LIRC_RCMM)
|
||||
#define is_const (ir.lirc.flags & LIRC_CONST_LENGTH)
|
||||
#define is_RF (ir.lirc.flags & LIRC_RF)
|
||||
#define has_header (ir.lirc.phead && ir.lirc.shead)
|
||||
#define has_foot (ir.lirc.pfoot && ir.lirc.sfoot)
|
||||
#define has_repeat (ir.lirc.prepeat && ir.lirc.srepeat)
|
||||
#define is_rc6 (lirctable->flags & LIRC_RC6)
|
||||
#define is_biphase ((lirctable->flags & LIRC_RC5) || is_rc6)
|
||||
#define is_rcmm (lirctable->flags & LIRC_RCMM)
|
||||
#define is_const (lirctable->flags & LIRC_CONST_LENGTH)
|
||||
#define is_RF (lirctable->flags & LIRC_RF)
|
||||
#define is_BO (lirctable->flags & LIRC_BO) /* flag for b&o specific protocol MN2017325 */
|
||||
#define has_header (lirctable->phead && lirctable->shead)
|
||||
#define has_foot (lirctable->pfoot && lirctable->sfoot)
|
||||
#define has_repeat (lirctable->prepeat && lirctable->srepeat)
|
||||
|
||||
//FS20 Protocol description see http://fhz4linux.info/tiki-index.php?page=FS20%20Protocol
|
||||
#define calcFS20pre(HC1,par1,HC2,par2) ((1<<18) | (HC1<<10) | (par1<<9) | (HC2<<1) | par2)
|
||||
|
|
|
@ -115,6 +115,7 @@ void __attribute__ ((section(".text.fastcode"))) NRC17_Encode(void)
|
|||
break;
|
||||
|
||||
}
|
||||
T1MR0 = cycles * NRC17_Module.lo_border * NRC17_Module.tval;
|
||||
}
|
||||
/*
|
||||
void NRC17_CopyMap(unsigned char xtra, unsigned short *map)
|
||||
|
|
|
@ -98,6 +98,7 @@ void __attribute__ ((section(".text.fastcode"))) RC5_Encode (void)
|
|||
}
|
||||
break;
|
||||
}
|
||||
T1MR0 = cycles * RC5_Module.lo_border * RC5_Module.tval;
|
||||
}
|
||||
|
||||
void RC5_Init(unsigned char map)
|
||||
|
|
|
@ -148,6 +148,7 @@ void __attribute__ ((section(".text.fastcode"))) RC6_Encode (void)
|
|||
}
|
||||
break;
|
||||
}
|
||||
T1MR0 = cycles * RC6_Module.lo_border * RC6_Module.tval;
|
||||
}
|
||||
|
||||
void RC6_Init(unsigned char map)
|
||||
|
|
|
@ -120,6 +120,7 @@ void __attribute__ ((section(".text.fastcode"))) RCA_Encode (void)
|
|||
}
|
||||
break;
|
||||
}
|
||||
T1MR0 = cycles * RCA_Module.lo_border * RCA_Module.tval;
|
||||
}
|
||||
|
||||
void RCA_LoadMap(unsigned char map)
|
||||
|
|
|
@ -117,6 +117,7 @@ void __attribute__ ((section(".text.fastcode"))) RCMM_Encode (void)
|
|||
|
||||
|
||||
}
|
||||
T1MR0 = cycles * RCMM_Module.lo_border * RCMM_Module.tval;
|
||||
}
|
||||
|
||||
void RCMM_LoadMap(unsigned char map)
|
||||
|
|
|
@ -117,6 +117,7 @@ void __attribute__ ((section(".text.fastcode"))) REC80_Encode (void)
|
|||
}
|
||||
break;
|
||||
}
|
||||
T1MR0 = cycles * REC80_Module.lo_border * REC80_Module.tval;
|
||||
}
|
||||
|
||||
void REC80_LoadMap(unsigned char map)
|
||||
|
|
|
@ -90,6 +90,7 @@ void __attribute__ ((section(".text.fastcode"))) RECS80_Encode (void)
|
|||
}
|
||||
break;
|
||||
}
|
||||
T1MR0 = cycles * RECS80_Module.lo_border * RECS80_Module.tval;
|
||||
}
|
||||
|
||||
void RECS80_Init(unsigned char map)
|
||||
|
|
|
@ -103,6 +103,8 @@ void __attribute__ ((section(".text.fastcode"))) SIRC_Encode (void)
|
|||
break;
|
||||
|
||||
}
|
||||
|
||||
T1MR0 = cycles * SIRC_Module.lo_border * SIRC_Module.tval;
|
||||
}
|
||||
|
||||
void SIRC_Init(unsigned char map)
|
||||
|
|
|
@ -137,6 +137,7 @@ void __attribute__ ((section(".text.fastcode"))) SPACEENC_Encode (void)
|
|||
}
|
||||
break;
|
||||
}
|
||||
T1MR0 = cycles * SPACEENC_Module.lo_border * SPACEENC_Module.tval;
|
||||
}
|
||||
|
||||
void SPACEENC_LoadMap(unsigned char map)
|
||||
|
|
82
boop/infrared/pwm.c
Normal file
82
boop/infrared/pwm.c
Normal file
|
@ -0,0 +1,82 @@
|
|||
/*
|
||||
pwm.c - pwm control
|
||||
Copyright (C) 2017 <telekatz@gmx.de>
|
||||
|
||||
This program is free software: you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation, either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include "global.h"
|
||||
#include "lpc2220.h"
|
||||
#include "irq.h"
|
||||
|
||||
void PWM_init(void)
|
||||
{
|
||||
//Set pin P0.21 IR_OUT as PWM
|
||||
PINSEL1 &= ~(3 << (10)); // IO
|
||||
PINSEL1 |= (1 << (10)); // PWM5
|
||||
|
||||
PWMTC = 0; //Timer Counter
|
||||
PWMPR = 0; //Prescale Register
|
||||
PWMPC = 0; //Prescale Counter
|
||||
|
||||
PWMMR0 = 416; // pwm rate
|
||||
PWMMR2 = 0x00; // pwm value sound
|
||||
PWMMR5 = 0x00; // pwm value IR
|
||||
|
||||
PWMLER = 0x26; //Latch Enable
|
||||
PWMMCR = 0x03; //Match Control
|
||||
PWMPCR |= (1<<13) | (1<<10);
|
||||
PWMTCR = 0x03;
|
||||
PWMTCR = 0x09;
|
||||
|
||||
/* PWMTC = 0;
|
||||
PWMPR = 7;
|
||||
PWMMR0 = 0x1E6; // pwm rate
|
||||
PWMMR2 = 0x00; // pwm value
|
||||
PWMLER = 0x05;
|
||||
PWMPCR = (1<<10);
|
||||
*/
|
||||
|
||||
//VICVectAddr0 = (unsigned long)&(soundIRQ);
|
||||
//VICVectCntl0 = VIC_SLOT_EN | INT_SRC_PWM;
|
||||
VICIntSelect |= INT_PWM;
|
||||
VICIntEnable = INT_PWM;
|
||||
|
||||
}
|
||||
|
||||
void PWM_set_frequency(unsigned long f)
|
||||
{
|
||||
if(f<5000) {
|
||||
PWMPR = 7;
|
||||
PWMMR0 = 1875000 / f;
|
||||
} else {
|
||||
PWMPR = 0;
|
||||
PWMMR0 = 15000000 / f;
|
||||
}
|
||||
PWMLER |= 0x01; //Latch Enable
|
||||
|
||||
|
||||
if(f < 32000) {
|
||||
PWMMCR = 0x03;
|
||||
} else {
|
||||
PWMMCR = 0x02;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void PWM_set_IR_duty_cycle(unsigned char d) {
|
||||
PWMMR5 = (PWMMR0 * d) / 100;
|
||||
PWMLER |= 0x20;
|
||||
}
|
||||
|
26
boop/infrared/pwm.h
Normal file
26
boop/infrared/pwm.h
Normal file
|
@ -0,0 +1,26 @@
|
|||
/*
|
||||
pwm.h - pwm control
|
||||
Copyright (C) 2017 <telekatz@gmx.de>
|
||||
|
||||
This program is free software: you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation, either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
|
||||
void PWM_init(void);
|
||||
void PWM_set_frequency(unsigned long f);
|
||||
void PWM_set_IR_duty_cycle(unsigned char d);
|
||||
|
||||
|
|
@ -71,12 +71,12 @@ unsigned restoreIRQ(unsigned oldCPSR)
|
|||
// (where's the vector? in lpc2220_rom.ld ?)
|
||||
void __attribute__ ((section(".text.fastcode"))) FIQ_Routine (void)
|
||||
{
|
||||
while ((PWMIR == 0x01) || (T1IR == 1))
|
||||
//while ((PWMIR == 0x01))
|
||||
{
|
||||
if (PWMIR == 0x01)
|
||||
soundIRQ(); // sound, backlight
|
||||
if (T1IR == 1)
|
||||
irIRQ(); // IR
|
||||
//if (T1IR == 1)
|
||||
// irIRQ(); // IR
|
||||
}
|
||||
}
|
||||
|
||||
|
|
22
boop/main.c
22
boop/main.c
|
@ -31,6 +31,7 @@
|
|||
//#include "sounds.h"
|
||||
//#include "sound3.h"
|
||||
#include "infrared.h"
|
||||
#include "pwm.h"
|
||||
#include "codes.h"
|
||||
#include "encoders.h"
|
||||
#include "ir_selector.h"
|
||||
|
@ -87,8 +88,8 @@ void setSpeed(unsigned char sp)
|
|||
|
||||
VPBDIV = 0x00;
|
||||
|
||||
BCFG0 = 0x100004A0;
|
||||
BCFG2 = 0x100004A0;
|
||||
BCFG0 = 0x10001CA0;
|
||||
BCFG2 = 0x10001CA0;
|
||||
BCFG1 = 0x00000C21;
|
||||
sysInfo |= SYS_TURBO;
|
||||
break;
|
||||
|
@ -102,8 +103,8 @@ void setSpeed(unsigned char sp)
|
|||
|
||||
VPBDIV = 0x02;
|
||||
|
||||
BCFG0 = 0x10000420;
|
||||
BCFG2 = 0x10000420;
|
||||
BCFG0 = 0x10000A20;
|
||||
BCFG2 = 0x10000A20;
|
||||
BCFG1 = 0x00000400;
|
||||
sysInfo &= ~SYS_TURBO;
|
||||
break;
|
||||
|
@ -198,6 +199,8 @@ void cpu_idle ()
|
|||
if(U0SCR)
|
||||
return;
|
||||
|
||||
return;
|
||||
|
||||
/* only idle mode instead of power down when:
|
||||
* * backlight on
|
||||
* * IR transmission
|
||||
|
@ -240,7 +243,8 @@ int main(void)
|
|||
FIOSET0 |= (1<<12);
|
||||
FIOCLR0 |= (1<<4);
|
||||
|
||||
setSpeed(SPEED_30);
|
||||
setSpeed(SPEED_60);
|
||||
BFS_Mount(); // flash file system
|
||||
|
||||
lcd_init(0);
|
||||
serial_init();
|
||||
|
@ -251,11 +255,13 @@ int main(void)
|
|||
initKeys();
|
||||
|
||||
initSound();
|
||||
startSoundIRQ();
|
||||
//startSoundIRQ();
|
||||
|
||||
initIR();
|
||||
startIrIRQ();
|
||||
|
||||
PWM_init();
|
||||
|
||||
RF_init();
|
||||
load_RF_setting();
|
||||
startRFIRQ();
|
||||
|
@ -279,10 +285,8 @@ int main(void)
|
|||
|
||||
set_font(BOLDFONT);
|
||||
|
||||
BFS_Mount(); // flash file system
|
||||
load_RC_setting(); // learned remote codes
|
||||
load_setting(); // display settings
|
||||
|
||||
load_RC_setting(); // learned remote codes
|
||||
|
||||
// recorded raw IR commands
|
||||
{
|
||||
|
|
|
@ -160,7 +160,7 @@ void printTime (unsigned char x, unsigned char y, struct time_* t, unsigned char
|
|||
void printDate (unsigned char x, unsigned char y, struct date_* d, unsigned char format)
|
||||
{
|
||||
unsigned char f;
|
||||
char s[16];
|
||||
char s[17];
|
||||
|
||||
f=activefont;
|
||||
set_font(SMALLFONT);
|
||||
|
|
|
@ -52,7 +52,9 @@ extern void uart0_irq(void);
|
|||
*/
|
||||
int serial_flush_input(void)
|
||||
{
|
||||
volatile unsigned int tmp;
|
||||
volatile unsigned int tmp=0;
|
||||
|
||||
(void)(tmp);
|
||||
|
||||
/* keep on reading as long as the receiver is not empty */
|
||||
while(RX_DATA(U0LSR)) {
|
||||
|
|
|
@ -42,7 +42,7 @@ void startTimerIRQ(void)
|
|||
T0TCR = 0x02; // reset timer
|
||||
T0TC = 1870;
|
||||
T0PR = 0x0e; // 15.000.000 Hz / 15 = 1.000.000 Hz --> PR = 15 - 1 = 0x0e
|
||||
T0MR0 = 5000; // 1.000.000 Hz / 5000 = 200 Hz = 5 msec intervall time
|
||||
T0MR0 = 250; // 1.000.000 Hz / 250 = 4000 Hz = 0,25msec intervall time
|
||||
T0MCR = 0x03; // reset and issue IRQ on TC == MR0
|
||||
T0TCR = 0x01; // enable timer
|
||||
|
||||
|
|
|
@ -21,14 +21,37 @@
|
|||
#include "timerfuncs.h"
|
||||
#include "lcd.h"
|
||||
|
||||
#define TIMER_PRESCALER 20
|
||||
|
||||
struct CB callbacks[MAX_CB];
|
||||
unsigned long* timeouts[MAX_TO];
|
||||
unsigned char timerPrescaler = TIMER_PRESCALER;
|
||||
unsigned char bl_val, cmp_val; // backlight PWM
|
||||
|
||||
|
||||
// wird alle 5 ms aufgerufen (s. startTimerIRQ() in timerfuncs)
|
||||
// wird alle 0.25 ms aufgerufen (s. startTimerIRQ() in timerfuncs)
|
||||
// bearbeitet eingetragene "timer"
|
||||
void __attribute__ ((section(".text.fastcode"))) timerIRQ(void)
|
||||
{
|
||||
// backlight pwm
|
||||
cmp_val += bl_val;
|
||||
if (cmp_val >= 63)
|
||||
{
|
||||
FIODIR0 |= (1<<4); // sck0/P0.4
|
||||
cmp_val -= 63;
|
||||
}
|
||||
else
|
||||
{
|
||||
FIODIR0 &= ~(1<<4); // sck0/P0.4
|
||||
}
|
||||
|
||||
|
||||
if(--timerPrescaler) {
|
||||
T0IR = 1;
|
||||
return;
|
||||
}
|
||||
timerPrescaler = TIMER_PRESCALER;
|
||||
|
||||
//5 msec intervall time
|
||||
unsigned int cnt;
|
||||
struct CB *cur_cb;
|
||||
|
||||
|
|
Loading…
Reference in a new issue