Initial transfer from sourceforge
This commit is contained in:
commit
f2259c5424
415 changed files with 73200 additions and 0 deletions
35
Asixtool/asix-testcode/Makefile
Normal file
35
Asixtool/asix-testcode/Makefile
Normal file
|
@ -0,0 +1,35 @@
|
|||
SDCCPATH=/opt/sdcc/
|
||||
SDCCBIN=$(SDCCPATH)/bin/
|
||||
SDCCEXTRA=$(SDCCPATH)/share/sdcc/
|
||||
|
||||
SDCC=$(SDCCBIN)/sdcc
|
||||
SDCCINC=$(SDCCEXTRA)/include/mcs51/
|
||||
SDCCLIB=$(SDCCEXTRA)/lib/large/
|
||||
SDCCMFLAGS=-mds390 --use-asix --opt-code-size --stack-size 0x80
|
||||
SDCCLFLAGS=--xram-loc 0x0000 --xram-size 0x8000 --iram-size 0x80 --code-loc 0x000000 --code-size 0x080000 --stack-loc 0x80 --idata-loc 0x30
|
||||
|
||||
OBJECTS=cpu_ax110xx.rel interrupt_ax110xx.rel main.rel uart/uart.rel
|
||||
|
||||
all : asix.bin
|
||||
|
||||
asix.bin: asix.ihx
|
||||
$(SDCCBIN)/makebin -p <asix.ihx >asix.bin
|
||||
|
||||
asix.ihx: $(OBJECTS)
|
||||
$(SDCC) -I$(SDCCINC) $(SDCCMFLAGS) $(SDCCLFLAGS) $(OBJECTS) -o asix.ihx
|
||||
|
||||
cpu_ax110xx.rel: cpu_ax110xx.c cpu_ax110xx.h ax110xx.h
|
||||
$(SDCC) -I$(SDCCINC) $(SDCCMFLAGS) -c cpu_ax110xx.c
|
||||
|
||||
interrupt_ax110xx.rel: interrupt_ax110xx.c interrupt_ax110xx.h ax110xx.h
|
||||
$(SDCC) -I$(SDCCINC) $(SDCCMFLAGS) -c interrupt_ax110xx.c
|
||||
|
||||
main.rel: main.c ax110xx.h interrupt_ax110xx.h cpu_ax110xx.h
|
||||
$(SDCC) -I$(SDCCINC) $(SDCCMFLAGS) -c main.c
|
||||
|
||||
uart/uart.rel: uart/uart.c ax110xx.h
|
||||
$(SDCC) -I$(SDCCINC) $(SDCCMFLAGS) -c -o uart/ uart/uart.c
|
||||
|
||||
clean:
|
||||
rm -f mon.ihx *.asm *.lst *.rel *.rst *.sym *.cdb *.map *.ihx *.lnk *.hex *.mem *.bin *~
|
||||
cd uart; rm -f *.asm *.lst *.rel *.rst *.sym *.cdb *.map *.ihx *.lnk *.hex *.mem *.bin *~; cd ..
|
35
Asixtool/asix-testcode/Makefile.bak
Normal file
35
Asixtool/asix-testcode/Makefile.bak
Normal file
|
@ -0,0 +1,35 @@
|
|||
SDCCPATH=F:/Tools/SDCC
|
||||
SDCCBIN=$(SDCCPATH)/bin
|
||||
SDCCEXTRA=$(SDCCPATH)/share/sdcc/
|
||||
|
||||
SDCC=$(SDCCBIN)/sdcc
|
||||
SDCCINC=$(SDCCPATH)/include/mcs51
|
||||
SDCCLIB=$(SDCCPATH)/lib/large/
|
||||
SDCCMFLAGS=-mds390 --use-asix --opt-code-size --stack-size 0x80
|
||||
SDCCLFLAGS=--xram-loc 0x0000 --xram-size 0x8000 --iram-size 0x80 --code-loc 0x000000 --code-size 0x080000 --stack-loc 0x80 --idata-loc 0x30
|
||||
|
||||
OBJECTS=cpu_ax110xx.rel interrupt_ax110xx.rel main.rel uart/uart.rel
|
||||
|
||||
all : asix.bin
|
||||
|
||||
asix.bin: asix.ihx
|
||||
$(SDCCBIN)/makebin -p <asix.ihx >asix.bin
|
||||
|
||||
asix.ihx: $(OBJECTS)
|
||||
$(SDCC) -I$(SDCCINC) $(SDCCMFLAGS) $(SDCCLFLAGS) $(OBJECTS) -o asix.ihx
|
||||
|
||||
cpu_ax110xx.rel: cpu_ax110xx.c cpu_ax110xx.h ax110xx.h
|
||||
$(SDCC) -I$(SDCCINC) $(SDCCMFLAGS) -c cpu_ax110xx.c
|
||||
|
||||
interrupt_ax110xx.rel: interrupt_ax110xx.c interrupt_ax110xx.h ax110xx.h
|
||||
$(SDCC) -I$(SDCCINC) $(SDCCMFLAGS) -c interrupt_ax110xx.c
|
||||
|
||||
main.rel: main.c ax110xx.h interrupt_ax110xx.h cpu_ax110xx.h
|
||||
$(SDCC) -I$(SDCCINC) $(SDCCMFLAGS) -c main.c
|
||||
|
||||
uart/uart.rel: uart/uart.c ax110xx.h
|
||||
$(SDCC) -I$(SDCCINC) $(SDCCMFLAGS) -c -o uart/ uart/uart.c
|
||||
|
||||
clean:
|
||||
rm -f mon.ihx *.asm *.lst *.rel *.rst *.sym *.cdb *.map *.ihx *.lnk *.hex *.mem *.bin *~
|
||||
cd uart; rm -f *.asm *.lst *.rel *.rst *.sym *.cdb *.map *.ihx *.lnk *.hex *.mem *.bin *~; cd ..
|
462
Asixtool/asix-testcode/ax110xx.h
Normal file
462
Asixtool/asix-testcode/ax110xx.h
Normal file
|
@ -0,0 +1,462 @@
|
|||
#ifndef AX110XX_H
|
||||
#define AX110XX_H
|
||||
|
||||
/* Byte Registers */
|
||||
__sfr __at (0x80) P0; // Port 0
|
||||
__sfr __at (0x81) SP; // Stack Pointer
|
||||
__sfr __at (0x82) DPL0; // Data Pointer 0 Low Byte
|
||||
__sfr __at (0x83) DPH0; // Data Pointer 0 High Byte
|
||||
__sfr __at (0x82) DPL; // Data Pointer 0 Low Byte
|
||||
__sfr __at (0x83) DPH; // Data Pointer 0 High Byte
|
||||
__sfr __at (0x84) DPL1; // Data Pointer 1 Low Byte
|
||||
__sfr __at (0x85) DPH1; // Data Pointer 1 High Byte
|
||||
__sfr __at (0x86) DPS; // Data Pointers Select Register
|
||||
__sfr __at (0x87) PCON; // Power Configuration Register
|
||||
__sfr __at (0x88) TCON; // Timer 0,1 Configuration Register
|
||||
__sfr __at (0x89) TMOD; // Timer 0,1 Control Mode Register
|
||||
__sfr __at (0x8A) TL0; // Timer 0 Low Byte Counter
|
||||
__sfr __at (0x8B) TL1; // Timer 1 Low Byte Counter
|
||||
__sfr __at (0x8C) TH0; // Timer 0 High Byte Counter
|
||||
__sfr __at (0x8D) TH1; // Timer 1 High Byte Counter
|
||||
__sfr __at (0x8E) CKCON; // Clock Control Register
|
||||
__sfr __at (0x8F) CSREPR; // Software Reset and External Program RAM Select Register
|
||||
|
||||
__sfr __at (0x90) P1; // Port 1
|
||||
__sfr __at (0x91) EIF; // Extended Interrupt Flag Register
|
||||
__sfr __at (0x92) WTST; // Program Wait States Register
|
||||
__sfr __at (0x93) DPX0; // Data Pointer Extended Register 0
|
||||
__sfr __at (0x93) DPX; // Data Pointer Extended Register 0
|
||||
__sfr __at (0x94) SDSTSR; // Software Timer and Software DMA complete interrupt status
|
||||
__sfr __at (0x95) DPX1; // Data Pointer Extended Register 1
|
||||
__sfr __at (0x96) I2CCIR; // I2C Command Index Register
|
||||
__sfr __at (0x97) I2CDR; // I2C Data Register
|
||||
__sfr __at (0x98) SCON0; // UART 0 Configuration Register
|
||||
__sfr __at (0x99) SBUF0; // UART 0 Buffer Register
|
||||
__sfr __at (0x9A) DBAR; // DMA Bus Arbitration Register
|
||||
__sfr __at (0x9B) DCIR; // DMA Command Index Register
|
||||
__sfr __at (0x9C) DDR; // DMA Data Register
|
||||
__sfr __at (0x9D) ACON; // Address Control Register
|
||||
__sfr __at (0x9E) PISSR1; // Peripheral Interrupt Status Summary Register 1
|
||||
__sfr __at (0x9F) PISSR2; // Peripheral Interrupt Status Summary Register 2
|
||||
|
||||
__sfr __at (0xA0) P2; // Port 2
|
||||
/* Local Bus Master Mode */
|
||||
__sfr __at (0xA1) LMSR; // Local Bus Mode Setup Register
|
||||
__sfr __at (0xA2) LCR; // Local Bus Command Register
|
||||
__sfr __at (0xA3) LSR; // Local Bus Status Register
|
||||
__sfr __at (0xA4) LDALR; // Local Bus Device Address Low Register
|
||||
__sfr __at (0xA5) LDAHR; // Local Bus Device Address High Register
|
||||
__sfr __at (0xA6) LDCSR; // Local Bus Device Chip Select Register
|
||||
/* Local Bus Slave Mode */
|
||||
__sfr __at (0xA1) LSAIER; // Local Bus Slave mode Action and Interrupt Enable Register
|
||||
__sfr __at (0xA2) LSCR; // Local Bus Slave mode Command Register
|
||||
__sfr __at (0xA3) LSSR; // Local Bus Slave mode Status Register
|
||||
__sfr __at (0xA4) XMWLR; // External Master Write-read Low Register
|
||||
__sfr __at (0xA5) XMWHR; // External Master Write-read High Register
|
||||
__sfr __at (0xA6) XMRLR; // External Master Read-only Low Register
|
||||
__sfr __at (0xA7) XMRHR; // External Master Read-only High Register
|
||||
__sfr __at (0xA8) IE; // Interrupt Enable register
|
||||
__sfr __at (0xA9) LDLR; // Local Bus Data Low Register
|
||||
__sfr __at (0xAA) LDHR; // Local Bus Data High Register
|
||||
__sfr __at (0xAB) DMALR; // Local Bus DMA Address Low Register
|
||||
__sfr __at (0xAC) DMAMR; // Local Bus DMA Address Medium Register
|
||||
__sfr __at (0xAD) DMAHR; // Local Bus DMA Address High Register
|
||||
__sfr __at (0xAE) TCIR; // TOE Command Index Register
|
||||
__sfr __at (0xAF) TDR; // TOE Data Register
|
||||
|
||||
__sfr __at (0xB0) P3; // Port 3
|
||||
__sfr __at (0xB1) CCAPL0; // PCA Module 0 Compare/Capture Low Byte Register
|
||||
__sfr __at (0xB2) CCAPL1; // PCA Module 1 Compare/Capture Low Byte Register
|
||||
__sfr __at (0xB3) CCAPL2; // PCA Module 2 Compare/Capture Low Byte Register
|
||||
__sfr __at (0xB4) CCAPL3; // PCA Module 3 Compare/Capture Low Byte Register
|
||||
__sfr __at (0xB5) CCAPL4; // PCA Module 4 Compare/Capture Low Byte Register
|
||||
__sfr __at (0xB6) MCIR; // MAC Command Index Register
|
||||
__sfr __at (0xB7) MDR; // MAC Data Register
|
||||
__sfr __at (0xB8) IP; // Interrupt Priority Register
|
||||
__sfr __at (0xB9) CCAPH0; // PCA Module 0 Compare/Capture High Byte Register
|
||||
__sfr __at (0xBA) CCAPH1; // PCA Module 1 Compare/Capture High Byte Register
|
||||
__sfr __at (0xBB) CCAPH2; // PCA Module 2 Compare/Capture High Byte Register
|
||||
__sfr __at (0xBC) CCAPH3; // PCA Module 3 Compare/Capture High Byte Register
|
||||
__sfr __at (0xBD) CCAPH4; // PCA Module 4 Compare/Capture High Byte Register
|
||||
__sfr __at (0xBE) EPCR; // Ethernet PHY Command Index Register
|
||||
__sfr __at (0xBF) EPDR; // Ethernet PHY Data Register
|
||||
|
||||
__sfr __at (0xC0) SCON1; // UART 1 Configuration Register
|
||||
__sfr __at (0xC1) SBUF1; // UART 1 Buffer Register
|
||||
__sfr __at (0xC2) CMOD; // PCA Timer/Counter Mode Register
|
||||
__sfr __at (0xC3) CCON; // PCA Timer/Counter Control Register
|
||||
__sfr __at (0xC4) CL; // PCA Timer/Counter Low
|
||||
__sfr __at (0xC5) CH; // PCA Timer/Counter High
|
||||
__sfr __at (0xC8) T2CON; // Timer 2 Configuration Register
|
||||
__sfr __at (0xC9) T2IF; // Timer 2 Interrupt Flags
|
||||
__sfr __at (0xCA) RLDL; // Timer 2 Reload Low Byte
|
||||
__sfr __at (0xCB) RLDH; // Timer 2 Reload High Byte
|
||||
__sfr __at (0xCC) TL2; // Timer 2 Low Byte Counter
|
||||
__sfr __at (0xCD) TH2; // Timer 2 High Byte Counter
|
||||
__sfr __at (0xCE) SPICIR; // SPI Command Index Register
|
||||
__sfr __at (0xCF) SPIDR; // SPI Data Register
|
||||
|
||||
__sfr __at (0xD0) PSW; // Program Status Word
|
||||
__sfr __at (0xD1) CCAPM0; // PCA Compare/Capture Module Mode Register 0
|
||||
__sfr __at (0xD2) CCAPM1; // PCA Compare/Capture Module Mode Register 1
|
||||
__sfr __at (0xD3) CCAPM2; // PCA Compare/Capture Module Mode Register 2
|
||||
__sfr __at (0xD4) CCAPM3; // PCA Compare/Capture Module Mode Register 3
|
||||
__sfr __at (0xD5) CCAPM4; // PCA Compare/Capture Module Mode Register 4
|
||||
__sfr __at (0xD6) OWCIR; // OneWire Command Index Register
|
||||
__sfr __at (0xD7) OWDR; // OneWire Data Register
|
||||
__sfr __at (0xD8) WDCON; // Watchdog Configuration
|
||||
__sfr __at (0xDE) CANCIR; // CAN Bus Command Index Register
|
||||
__sfr __at (0xDF) CANDR; // CAN Bus Data Register
|
||||
|
||||
__sfr __at (0xE0) ACC; // Accumulator
|
||||
/* UART2 registers */
|
||||
__sfr __at (0xE1) UR2_DLL;// High Speed UART2 Divisor Latch Low Register
|
||||
__sfr __at (0xE1) UR2_THR;// High Speed UART2 Transmit Holding Register for Writing
|
||||
__sfr __at (0xE1) UR2_RBR;// High Speed UART2 Receive Buffer Register for Reading
|
||||
__sfr __at (0xE2) UR2_DLH;// High Speed UART2 Divisor Latch High Register
|
||||
__sfr __at (0xE2) UR2_IER;// High Speed UART2 Interrupt Enable Register
|
||||
__sfr __at (0xE3) UR2_FCR;// High Speed UART2 FIFO Control Register for Writing
|
||||
__sfr __at (0xE3) UR2_IIR;// High Speed UART2 Interrupt Identification Register for Reading
|
||||
__sfr __at (0xE4) UR2_LCR;// High Speed UART2 Line Control Register
|
||||
__sfr __at (0xE5) UR2_MCR;// High Speed UART2 Modem Control Register
|
||||
__sfr __at (0xE6) UR2_LSR;// High Speed UART2 Line Status Register
|
||||
__sfr __at (0xE7) UR2_MSR;// High Speed UART2 Modem Status Register
|
||||
__sfr __at (0xE8) EIE; // External Interrupt Enable
|
||||
__sfr __at (0xE9) STATUS; // Status Register
|
||||
__sfr __at (0xEA) MXAX; // MOVX @Ri Extended Register
|
||||
__sfr __at (0xEB) TA; // Timed Access Protection
|
||||
|
||||
__sfr __at (0xF0) B; // B Working Register
|
||||
__sfr __at (0xF8) EIP; // Extended Interrupt Priority Register
|
||||
__sfr __at (0xF9) MD0; // MDU Data 0
|
||||
__sfr __at (0xFA) MD1; // MDU Data 1
|
||||
__sfr __at (0xFB) MD2; // MDU Data 2
|
||||
__sfr __at (0xFC) MD3; // MDU Data 3
|
||||
__sfr __at (0xFD) MD4; // MDU Data 4
|
||||
__sfr __at (0xFE) MD5; // MDU Data 5
|
||||
__sfr __at (0xFF) ARCON ;// MDU Control Register
|
||||
|
||||
/* Bit Registers */
|
||||
|
||||
/* P0 (0x80) Bit Registers */
|
||||
__sbit __at (0x80) P0_0;
|
||||
__sbit __at (0x81) P0_1;
|
||||
__sbit __at (0x82) P0_2;
|
||||
__sbit __at (0x83) P0_3;
|
||||
__sbit __at (0x84) P0_4;
|
||||
__sbit __at (0x85) P0_5;
|
||||
__sbit __at (0x86) P0_6;
|
||||
__sbit __at (0x87) P0_7;
|
||||
|
||||
/* DPS (0x86) Bit Values */
|
||||
#define SEL_ 0x01
|
||||
#define TSL_ 0x20
|
||||
#define ID0_ 0x40
|
||||
#define ID1_ 0x80
|
||||
|
||||
/* PCON (0x87) Bit Values */
|
||||
#define PMM_ 0x01
|
||||
#define STOP_ 0x02
|
||||
#define SWB_ 0x04
|
||||
#define PWE_ 0x10
|
||||
#define SMOD1_ 0x40
|
||||
#define SMOD2_ 0x80
|
||||
|
||||
/* TCON (0x88) Bit Registers */
|
||||
__sbit __at (0x88) IT0;
|
||||
__sbit __at (0x89) IE0;
|
||||
__sbit __at (0x8A) IT1;
|
||||
__sbit __at (0x8B) IE1;
|
||||
__sbit __at (0x8C) TR0;
|
||||
__sbit __at (0x8D) TF0;
|
||||
__sbit __at (0x8E) TR1;
|
||||
__sbit __at (0x8F) TF1;
|
||||
|
||||
/* TMOD (0x89) Bit Values */
|
||||
#define T0_M0_ 0x01
|
||||
#define T0_M1_ 0x02
|
||||
#define T0_CT_ 0x04
|
||||
#define T0_GATE_ 0x08
|
||||
#define T1_M0_ 0x10
|
||||
#define T1_M1_ 0x20
|
||||
#define T1_CT_ 0x40
|
||||
#define T1_GATE_ 0x80
|
||||
|
||||
#define T1_MASK_ 0xF0
|
||||
#define T0_MASK_ 0x0F
|
||||
|
||||
/* CKCON (0x8E) Bit Values */
|
||||
#define MD0_ 0x01
|
||||
#define MD1_ 0x02
|
||||
#define MD2_ 0x04
|
||||
#define T0M_ 0x08
|
||||
#define T1M_ 0x10
|
||||
#define T2M_ 0x20
|
||||
#define WD0_ 0x40
|
||||
#define WD1_ 0x80
|
||||
|
||||
/* CSREPR (0x8F) Bit Values */
|
||||
#define SW_RST 0x01
|
||||
#define SW_RBT 0x02
|
||||
#define FARM 0x04
|
||||
#define FAES 0x08
|
||||
#define PMS 0x10
|
||||
#define SCS_100M 0xC0
|
||||
#define SCS_75M 0x80
|
||||
#define SCS_50M 0x40
|
||||
#define SCS_25M 0x00
|
||||
|
||||
/* P1 (0x90) Bit Registers */
|
||||
__sbit __at (0x90) P1_0;
|
||||
__sbit __at (0x91) P1_1;
|
||||
__sbit __at (0x92) P1_2;
|
||||
__sbit __at (0x93) P1_3;
|
||||
__sbit __at (0x94) P1_4;
|
||||
__sbit __at (0x95) P1_5;
|
||||
__sbit __at (0x96) P1_6;
|
||||
__sbit __at (0x97) P1_7;
|
||||
|
||||
/* EIF (0x91) Bit Values */
|
||||
#define INT2F 0x01
|
||||
#define INT3F 0x02
|
||||
#define INT4F 0x04
|
||||
#define INT5F 0x08
|
||||
#define INT6F 0x10
|
||||
|
||||
/* SCON0 (0x98) Bit Registers */
|
||||
__sbit __at (0x98) RI0;
|
||||
__sbit __at (0x99) TI0;
|
||||
__sbit __at (0x9A) RB08;
|
||||
__sbit __at (0x9B) TB08;
|
||||
__sbit __at (0x9C) REN0;
|
||||
__sbit __at (0x9D) SM02;
|
||||
__sbit __at (0x9E) SM01;
|
||||
__sbit __at (0x9F) SM00;
|
||||
|
||||
/* DBAR (0x9A) Bit Values */
|
||||
#define BUS_REQ 0x01
|
||||
#define BUS_GRANT 0x80
|
||||
|
||||
/* ACON (0x9D) Bit Values */
|
||||
#define FLAT_MODE 0x02
|
||||
#define LARGE_MODE 0x00
|
||||
|
||||
/* PISSR1 (0x9E) Bit Values */
|
||||
#define LB_INT_STU 0x01
|
||||
#define LB_EXT_INT_STU 0x02
|
||||
#define ETH_INT_STU 0x04
|
||||
#define TOE_INT_STU 0x08
|
||||
#define OW_INT_STU 0x10
|
||||
#define SPI_INT_STU 0x20
|
||||
#define I2C_INT_STU 0x40
|
||||
#define CAN_INT_STU 0x80
|
||||
|
||||
/* PISSR2 (0x9F) Bit Values */
|
||||
#define UART2_INT_STU 0x01
|
||||
|
||||
/* P2 (0xA0) Bit Registers */
|
||||
__sbit __at (0xA0) P2_0;
|
||||
__sbit __at (0xA1) P2_1;
|
||||
__sbit __at (0xA2) P2_2;
|
||||
__sbit __at (0xA3) P2_3;
|
||||
__sbit __at (0xA4) P2_4;
|
||||
__sbit __at (0xA5) P2_5;
|
||||
__sbit __at (0xA6) P2_6;
|
||||
__sbit __at (0xA7) P2_7;
|
||||
|
||||
/* IE (0xA8) Bit Registers */
|
||||
__sbit __at (0xA8) EX0; /* 1=Enable External interrupt 0 */
|
||||
__sbit __at (0xA9) ET0; /* 1=Enable Timer 0 interrupt */
|
||||
__sbit __at (0xAA) EX1; /* 1=Enable External interrupt 1 */
|
||||
__sbit __at (0xAB) ET1; /* 1=Enable Timer 1 interrupt */
|
||||
__sbit __at (0xAC) ES0; /* 1=Enable Serial port 0 interrupt */
|
||||
__sbit __at (0xAD) ET2; /* 1=Enable Timer 2 interrupt */
|
||||
__sbit __at (0xAE) ES1; /* 1=Enable Serial port 1 interrupt */
|
||||
__sbit __at (0xAF) EA; /* 0=Disable all interrupts */
|
||||
|
||||
/* P3 (0xB0) Bit Registers (Mnemonics & Ports) */
|
||||
__sbit __at (0xB0) P3_0;
|
||||
__sbit __at (0xB1) P3_1;
|
||||
__sbit __at (0xB2) P3_2;
|
||||
__sbit __at (0xB3) P3_3;
|
||||
__sbit __at (0xB4) P3_4;
|
||||
__sbit __at (0xB5) P3_5;
|
||||
__sbit __at (0xB6) P3_6;
|
||||
__sbit __at (0xB7) P3_7;
|
||||
|
||||
__sbit __at (0xB0) RXD; /* Serial data input */
|
||||
__sbit __at (0xB1) TXD; /* Serial data output */
|
||||
__sbit __at (0xB2) INT0; /* External interrupt 0 */
|
||||
__sbit __at (0xB3) INT1; /* External interrupt 1 */
|
||||
__sbit __at (0xB4) T0; /* Timer 0 external input */
|
||||
__sbit __at (0xB5) T1; /* Timer 1 external input */
|
||||
__sbit __at (0xB6) WR; /* External data memory write strobe */
|
||||
__sbit __at (0xB7) RD; /* External data memory read strobe */
|
||||
|
||||
/* IP (0xB8) Bit Registers */
|
||||
__sbit __at (0xB8) PX0;
|
||||
__sbit __at (0xB9) PT0;
|
||||
__sbit __at (0xBA) PX1;
|
||||
__sbit __at (0xBB) PT1;
|
||||
__sbit __at (0xBC) PS0;
|
||||
__sbit __at (0xBD) PT2;
|
||||
__sbit __at (0xBE) PS1;
|
||||
|
||||
/* SCON1 (0xC0) Bit Registers */
|
||||
__sbit __at (0xC0) RI1;
|
||||
__sbit __at (0xC1) TI1;
|
||||
__sbit __at (0xC2) RB18;
|
||||
__sbit __at (0xC3) TB18;
|
||||
__sbit __at (0xC4) REN1;
|
||||
__sbit __at (0xC5) SM12;
|
||||
__sbit __at (0xC6) SM11;
|
||||
__sbit __at (0xC7) SM10;
|
||||
|
||||
/* CMOM (0xC2) Bit Values */
|
||||
#define PCA_ECF 0x01
|
||||
#define PCA_T0_OF 0x08
|
||||
#define PCA_EXT_CLK 0x0E
|
||||
#define PCA_GATE_OFF 0x80
|
||||
|
||||
/* CCON (0xC3) Bit Values */
|
||||
#define PCA_CCF0 0x01
|
||||
#define PCA_CCF1 0x02
|
||||
#define PCA_CCF2 0x04
|
||||
#define PCA_CCF3 0x08
|
||||
#define PCA_CCF4 0x10
|
||||
#define PCA_CR 0x40
|
||||
#define PCA_CF 0x80
|
||||
|
||||
/* T2CON (0xC8) Bit Registers */
|
||||
__sbit __at (0xC8) CPRL2;
|
||||
__sbit __at (0xC9) CT2;
|
||||
__sbit __at (0xCA) TR2;
|
||||
__sbit __at (0xCB) EXEN2;
|
||||
__sbit __at (0xCC) TCLK;
|
||||
__sbit __at (0xCD) RCLK;
|
||||
__sbit __at (0xCE) EXF2;
|
||||
__sbit __at (0xCF) TF2;
|
||||
|
||||
/* PSW (0xD0) Bit Registers */
|
||||
__sbit __at (0xD0) P;
|
||||
__sbit __at (0xD1) F1;
|
||||
__sbit __at (0xD2) OV;
|
||||
__sbit __at (0xD3) RS0;
|
||||
__sbit __at (0xD4) RS1;
|
||||
__sbit __at (0xD5) F0;
|
||||
__sbit __at (0xD6) AC;
|
||||
__sbit __at (0xD7) CY;
|
||||
|
||||
/* CCAPM0-4 (0xD1-0xD5) Bit Values */
|
||||
#define ECCFs 0x01
|
||||
#define PWMs 0x02
|
||||
#define TOGs 0x04
|
||||
#define MATs 0x08
|
||||
#define CAPNs 0x10
|
||||
#define CAPPs 0x20
|
||||
#define ECOMs 0x40
|
||||
#define CEXs 0x80
|
||||
|
||||
/* PSW (0xD8) Bit Registers */
|
||||
__sbit __at (0xD8) RWT;
|
||||
__sbit __at (0xD9) EWT;
|
||||
__sbit __at (0xDA) WTRF;
|
||||
__sbit __at (0xDB) WDIF;
|
||||
|
||||
/* Interrupt Vectors: Address = (N * 8) + 3 */
|
||||
#define IE0_VECTOR 0 /* 0x03 External Interrupt 0 */
|
||||
#define TF0_VECTOR 1 /* 0x0B Timer 0 */
|
||||
#define IE1_VECTOR 2 /* 0x13 External Interrupt 1 */
|
||||
#define TF1_VECTOR 3 /* 0x1B Timer 1 */
|
||||
#define SIO0_VECTOR 4 /* 0x23 Serial port */
|
||||
#define TF2_VECTOR 5 /* 0x2B Timer 2 */
|
||||
#define SIO1_VECTOR 6 /* 0x33 Serial port */
|
||||
#define DMA_VECTOR 7 /* 0x3B Internal DMA Transfer */
|
||||
#define PCA_VECTOR 8 /* 0x43 Internal Programmable Counter Array */
|
||||
#define PIR_VECTOR 9 /* 0x4B Internal Peripherial IRQ */
|
||||
#define SDMA_VECTOR 10 /* 0x53 Internal Software DMA */
|
||||
#define WU_VECTOR 11 /* 0x5B Wake-Up */
|
||||
#define WDT_VECTOR 12 /* 0x63 Internal Watchdog */
|
||||
|
||||
/* UR2_IER (0xE2) Bit Values */
|
||||
#define UR2_RDI_ENB 0x01
|
||||
#define UR2_THRI_ENB 0x02
|
||||
#define UR2_RLSI_ENB 0x04
|
||||
#define UR2_MSI_ENB 0x08
|
||||
|
||||
/* UR2_IIR (0xE3) Bit Values */
|
||||
#define UR2_NONE_INTR 0x01
|
||||
#define UR2_RLS_INTR 0x06
|
||||
#define UR2_RD_TRIG_INTR 0x04
|
||||
#define UR2_RD_TI_INTR 0x0C
|
||||
#define UR2_THRE_INTR 0x02
|
||||
#define UR2_MS_INTR 0x00
|
||||
|
||||
/* UR2_FCR (0xE3) Bit Values */
|
||||
#define UR2_FIFO_MODE 0x01
|
||||
#define UR2_RXFIFO_RST 0x02
|
||||
#define UR2_TXFIFO_RST 0x04
|
||||
#define UR2_TRIG_01 0x00
|
||||
#define UR2_TRIG_04 0x40
|
||||
#define UR2_TRIG_08 0x80
|
||||
#define UR2_TRIG_14 0xC0
|
||||
|
||||
/* UR2_LCR (0xE4) Bit Values */
|
||||
#define UR2_CHAR_5 0x00
|
||||
#define UR2_CHAR_6 0x01
|
||||
#define UR2_CHAR_7 0x02
|
||||
#define UR2_CHAR_8 0x03
|
||||
#define UR2_STOP_10 0x00
|
||||
#define UR2_STOP_15 0x04
|
||||
#define UR2_PARITY_ENB 0x08
|
||||
#define UR2_EVEN_PARITY 0x10
|
||||
#define UR2_STICK_PARITY 0x20
|
||||
#define UR2_BREAK_ENB 0x40
|
||||
#define UR2_DLAB_ENB 0x80
|
||||
|
||||
/* UR2_MCR (0xE5) Bit Values */
|
||||
#define UR2_DTR 0x01
|
||||
#define UR2_RTS 0x02
|
||||
#define UR2_OUT1 0x04
|
||||
#define UR2_OUT2 0x08
|
||||
#define UR2_LOOPBACK 0x10
|
||||
#define UR2_RS485_RECEIVE 0x40
|
||||
#define UR2_RS485_DRIVE 0x80
|
||||
|
||||
/* UR2_LSR (0xE6) Bit Values */
|
||||
#define UR2_DR 0x01
|
||||
#define UR2_OE 0x02
|
||||
#define UR2_PE 0x04
|
||||
#define UR2_FE 0x08
|
||||
#define UR2_BI 0x10
|
||||
#define UR2_THRE 0x20
|
||||
#define UR2_TEMT 0x40
|
||||
#define UR2_FRAME_ERR 0x80
|
||||
|
||||
/* UR2_MSR (0xE7) Bit Values */
|
||||
#define UR2_DCTS 0x01
|
||||
#define UR2_DDSR 0x02
|
||||
#define UR2_TERI 0x04
|
||||
#define UR2_DDCD 0x08
|
||||
#define UR2_CTS 0x10
|
||||
#define UR2_DSR 0x20
|
||||
#define UR2_RI 0x40
|
||||
#define UR2_DCD 0x80
|
||||
|
||||
/* EIE (0xE8) Bit Registers */
|
||||
__sbit __at (0xE8) EINT2;
|
||||
__sbit __at (0xE9) EINT3;
|
||||
__sbit __at (0xEA) EINT4;
|
||||
__sbit __at (0xEB) EINT5;
|
||||
__sbit __at (0xEC) EINT6;
|
||||
__sbit __at (0xED) EWDI;
|
||||
|
||||
/* EIP (0xF8) Bit Registers */
|
||||
__sbit __at (0xF8) PINT2;
|
||||
__sbit __at (0xF9) PINT3;
|
||||
__sbit __at (0xFA) PINT4;
|
||||
__sbit __at (0xFB) PINT5;
|
||||
__sbit __at (0xFC) PINT6;
|
||||
__sbit __at (0xFD) PWDI;
|
||||
|
||||
#endif
|
177
Asixtool/asix-testcode/cpu_ax110xx.c
Normal file
177
Asixtool/asix-testcode/cpu_ax110xx.c
Normal file
|
@ -0,0 +1,177 @@
|
|||
#include "ax110xx.h"
|
||||
#include "interrupt_ax110xx.h"
|
||||
#include "cpu_ax110xx.h"
|
||||
#include "types_ax110xx.h"
|
||||
|
||||
static unsigned char globeInt = 0;
|
||||
static unsigned char cpuSysClk = 0;
|
||||
static unsigned char memShadow = 0;
|
||||
static unsigned char progWtst = 0;
|
||||
static unsigned char dataStretch = 0;
|
||||
|
||||
void AX11000_Init(void)
|
||||
{
|
||||
EA = 0; // turn off globe interrupt
|
||||
|
||||
P0 = 0xFF;
|
||||
P1 = 0xFF;
|
||||
P2 = 0xFF;
|
||||
P3 = 0xFF;
|
||||
|
||||
/* Check program wait-state and data memory wait-state */
|
||||
if (CSREPR & PMS)
|
||||
{
|
||||
memShadow = 1;
|
||||
|
||||
/* for real chip */
|
||||
switch (CSREPR & (BIT6|BIT7))
|
||||
{
|
||||
case SCS_100M :
|
||||
cpuSysClk = SCS_100M;
|
||||
WTST = 0x01;
|
||||
CKCON = 0x01;
|
||||
break;
|
||||
case SCS_50M :
|
||||
cpuSysClk = SCS_50M;
|
||||
WTST = 0x00;
|
||||
CKCON = 0x01;
|
||||
break;
|
||||
case SCS_25M :
|
||||
cpuSysClk = SCS_25M;
|
||||
WTST = 0x00;
|
||||
CKCON = 0x01;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
memShadow = 0;
|
||||
|
||||
/* for real chip */
|
||||
switch (CSREPR & (BIT6|BIT7))
|
||||
{
|
||||
case SCS_100M :
|
||||
cpuSysClk = SCS_100M;
|
||||
WTST = 0x07;
|
||||
CKCON = 0x01;
|
||||
break;
|
||||
case SCS_50M :
|
||||
cpuSysClk = SCS_50M;
|
||||
WTST = 0x03;
|
||||
CKCON = 0x01;
|
||||
break;
|
||||
case SCS_25M :
|
||||
cpuSysClk = SCS_25M;
|
||||
WTST = 0x01;
|
||||
CKCON = 0x01;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
progWtst = WTST & 0x07;
|
||||
dataStretch = CKCON & 0x07;
|
||||
|
||||
PCON &= ~SWB_; // Turn off switchback function.
|
||||
|
||||
EIF &= ~INT5F; // Clear the flag of interrupt 5.
|
||||
EIF &= ~INT6F; // Clear the flag of interrupt 6.
|
||||
if (WTRF)
|
||||
{
|
||||
CSREPR |= SW_RST;
|
||||
WTRF = 0; // Clear Watch Dog Time Out Reset Flag.
|
||||
}
|
||||
|
||||
PINT2 = 1; // INT2 priority is at high level for DMA request.
|
||||
|
||||
EXTINT0(OFF); // EINT0 interrupt.
|
||||
EXTINT1(OFF); // EINT1 interrupt.
|
||||
EXTINT2(OFF); // EINT2 interrupt for DMA request.
|
||||
EXTINT3(OFF); // EINT3 interrupt for PCA.
|
||||
EXTINT4(OFF); // EINT4 interrupt for peripheral device.
|
||||
EXTINT5(OFF); // EINT5 interrupt for software timer.
|
||||
EXTINT6(OFF); // EINT6 interrupt for wake-up of power management mode and stop mode.
|
||||
|
||||
if (globeInt & BIT7)
|
||||
EA = globeInt & BIT0;
|
||||
else
|
||||
EA = 1; // Enable the globe interrupt.
|
||||
}
|
||||
|
||||
unsigned char AX11000_GetSysClk(void)
|
||||
{
|
||||
return cpuSysClk;
|
||||
}
|
||||
|
||||
unsigned char AX11000_GetMemSdw(void)
|
||||
{
|
||||
return memShadow;
|
||||
}
|
||||
|
||||
unsigned char AX11000_GetProgWst(void)
|
||||
{
|
||||
return progWtst;
|
||||
}
|
||||
|
||||
unsigned char AX11000_GetDataSth(void)
|
||||
{
|
||||
return dataStretch;
|
||||
}
|
||||
|
||||
void AX11000_SoftReset(void)
|
||||
{
|
||||
if (EA)
|
||||
globeInt = BIT0 | BIT7; // BIT0:EA bit record ; BIT7:Software reset record.
|
||||
else
|
||||
globeInt = BIT7;
|
||||
|
||||
EA = 0;
|
||||
|
||||
CSREPR |= SW_RST;
|
||||
}
|
||||
|
||||
void AX11000_SoftReboot(void)
|
||||
{
|
||||
CSREPR |= SW_RBT;
|
||||
}
|
||||
|
||||
void AX11000_WatchDogSetting(unsigned char wdIntrEnb, unsigned char wdRstEnb, unsigned char wdPrty, unsigned char wdTime)
|
||||
{
|
||||
CKCON |= wdTime;
|
||||
|
||||
if (wdIntrEnb & WD_INTR_ENABLE)
|
||||
{
|
||||
EWDI = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
EWDI = 0;
|
||||
}
|
||||
|
||||
if (wdRstEnb & WD_RESET_ENABLE)
|
||||
{
|
||||
TA = 0xAA;
|
||||
TA = 0x55;
|
||||
EWT = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
TA = 0xAA;
|
||||
TA = 0x55;
|
||||
EWT = 0;
|
||||
}
|
||||
|
||||
if (wdPrty & WD_HIGH_PRIORITY)
|
||||
{
|
||||
PWDI = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
PWDI = 0;
|
||||
}
|
||||
|
||||
TA = 0xAA;
|
||||
TA = 0x55;
|
||||
RWT = 1;
|
||||
WTRF = 0;
|
||||
WDIF = 0;
|
||||
}
|
61
Asixtool/asix-testcode/cpu_ax110xx.h
Normal file
61
Asixtool/asix-testcode/cpu_ax110xx.h
Normal file
|
@ -0,0 +1,61 @@
|
|||
#ifndef AX11000_H
|
||||
#define AX11000_H
|
||||
|
||||
#define GET_SYS_VALUE 1 // 1:get the system globe value information
|
||||
#define AX_SWRST_ENB 0 // 1:use software reset function ; 0:not use
|
||||
#define AX_SWRBT_ENB 0 // 1:use software reboot function ; 0:not use
|
||||
#define STOE_ENABLE 0
|
||||
#define AX_WATCHDOG_ENB 0 // 1:involve watchdog function ; 0:not use
|
||||
|
||||
/*-------------------------------------------------------------*/
|
||||
#define RUNTIME_CODE_START_AT_0H 0 /* 0: runtime code start at 0h */
|
||||
#define RUNTIME_CODE_START_AT_24kH 1 /* 1: runtime code start at 24kh. */
|
||||
#define RUNTIME_CODE_START_ADDRESS (RUNTIME_CODE_START_AT_0H)
|
||||
|
||||
/* MACRO DECLARATIONS */
|
||||
#define AX_DBG_LED(value) {P1 = value;} // debug LED port, default is P1
|
||||
|
||||
/* NAMING CONSTANT DECLARATIONS */
|
||||
#define PROG_WTST_0 0
|
||||
#define PROG_WTST_1 1
|
||||
#define PROG_WTST_2 2
|
||||
#define PROG_WTST_3 3
|
||||
#define PROG_WTST_4 4
|
||||
#define PROG_WTST_5 5
|
||||
#define PROG_WTST_6 6
|
||||
#define PROG_WTST_7 7
|
||||
#define DATA_STRETCH_0 0
|
||||
#define DATA_STRETCH_1 1
|
||||
#define DATA_STRETCH_2 2
|
||||
#define DATA_STRETCH_3 3
|
||||
#define DATA_STRETCH_4 4
|
||||
#define DATA_STRETCH_5 5
|
||||
#define DATA_STRETCH_6 6
|
||||
#define DATA_STRETCH_7 7
|
||||
|
||||
#define SHADOW_MEM_ENB 0x10
|
||||
#define SYS_CLK_100M 0xC0
|
||||
#define SYS_CLK_50M 0x40
|
||||
#define SYS_CLK_25M 0x00
|
||||
|
||||
#define WD_INTR_ENABLE 1
|
||||
#define WD_INTR_DISABLE 0
|
||||
#define WD_RESET_ENABLE 1
|
||||
#define WD_RESET_DISABLE 0
|
||||
#define WD_HIGH_PRIORITY 1
|
||||
#define WD_LOW_PRIORITY 0
|
||||
#define WD_INTERVAL_131K 0x00
|
||||
#define WD_INTERVAL_1M WD0_
|
||||
#define WD_INTERVAL_8M WD1_
|
||||
#define WD_INTERVAL_67M WD1_|WD0_
|
||||
|
||||
void AX11000_Init(void);
|
||||
unsigned char AX11000_GetSysClk(void);
|
||||
unsigned char AX11000_GetMemSdw(void);
|
||||
unsigned char AX11000_GetProgWst(void);
|
||||
unsigned char AX11000_GetDataSth(void);
|
||||
void AX11000_SoftReset(void);
|
||||
void AX11000_SoftReboot(void);
|
||||
void AX11000_WatchDogSetting(unsigned char wdIntrEnb, unsigned char wdRstEnb, unsigned char wdPrty, unsigned char wdTime);
|
||||
|
||||
#endif /* End of AX11000_H */
|
188
Asixtool/asix-testcode/interrupt_ax110xx.c
Normal file
188
Asixtool/asix-testcode/interrupt_ax110xx.c
Normal file
|
@ -0,0 +1,188 @@
|
|||
#include "ax110xx.h"
|
||||
#include "cpu_ax110xx.h"
|
||||
#include "interrupt_ax110xx.h"
|
||||
#include "types_ax110xx.h"
|
||||
|
||||
#if LBI_IRQ_ENABLE
|
||||
#include "lbi.h"
|
||||
#endif
|
||||
|
||||
#if ETH_IRQ_ENABLE
|
||||
#include "ethernet/mac.h"
|
||||
#include "ethernet/stoe.h"
|
||||
#endif
|
||||
|
||||
#if I2C_IRQ_ENABLE
|
||||
#include "i2c.h"
|
||||
#endif
|
||||
|
||||
#if SPI_IRQ_ENABLE
|
||||
#include "spi.h"
|
||||
#endif
|
||||
|
||||
#if ONEWIRE_IRQ_ENABLE
|
||||
#include "onewire.h"
|
||||
#endif
|
||||
|
||||
#if CAN_IRQ_ENABLE
|
||||
#include "can.h"
|
||||
#endif
|
||||
|
||||
#if HSUART_IRQ_ENABLE
|
||||
#include "hsuart.h"
|
||||
#endif
|
||||
|
||||
void ax11000_PeripherialISR(void) __interrupt 9;
|
||||
|
||||
#if POWER_MANAGEMENT_IRQ_ENABLE
|
||||
void ax11000_PmmISR(void);
|
||||
#endif
|
||||
|
||||
#if WATCHDOG_IRQ_ENB
|
||||
void ax11000_WatchDogISR(void);
|
||||
#endif
|
||||
|
||||
void ax11000_PeripherialISR(void) __interrupt 9
|
||||
{
|
||||
unsigned int intrStt1 = 0;
|
||||
unsigned int intrStt2 = 0;
|
||||
|
||||
/* Interrupt type check */
|
||||
while (1)
|
||||
{
|
||||
EA = 0;
|
||||
intrStt1 = PISSR1;
|
||||
intrStt2 = PISSR2;
|
||||
EA = 1;
|
||||
|
||||
if ((intrStt1 == 0) && (intrStt2 == 0))
|
||||
break;
|
||||
|
||||
#if LBI_IRQ_ENABLE
|
||||
if (intrStt1 & LB_INT_STU)
|
||||
{
|
||||
LocalBusFunc();
|
||||
}
|
||||
|
||||
if (intrStt1 & LB_EXT_INT_STU)
|
||||
{
|
||||
LocalBusAccessCompleteFunc();
|
||||
}
|
||||
#endif
|
||||
|
||||
#if ETH_IRQ_ENABLE
|
||||
#if (MAC_GET_INTSTATUS_MODE == MAC_INTERRUPT_MODE)
|
||||
if (intrStt1 & ETH_INT_STU)
|
||||
{
|
||||
MAC_SetInterruptFlag();
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if ETH_IRQ_ENABLE
|
||||
#if (STOE_GET_INTSTATUS_MODE == STOE_INTERRUPT_MODE)
|
||||
if (intrStt1 & TOE_INT_STU)
|
||||
{
|
||||
STOE_SetInterruptFlag();
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if CAN_IRQ_ENABLE
|
||||
if (intrStt1 & CAN_INT_STU)
|
||||
{
|
||||
CAN_Func();
|
||||
}
|
||||
#endif
|
||||
|
||||
#if I2C_IRQ_ENABLE
|
||||
if (intrStt1 & I2C_INT_STU)
|
||||
{
|
||||
I2C_Func();
|
||||
}
|
||||
#endif
|
||||
|
||||
#if SPI_IRQ_ENABLE
|
||||
if (intrStt1 & SPI_INT_STU)
|
||||
{
|
||||
SPI_Func();
|
||||
}
|
||||
#endif
|
||||
|
||||
#if ONEWIRE_IRQ_ENABLE
|
||||
if (intrStt1 & OW_INT_STU)
|
||||
{
|
||||
ONEWIRE_Func();
|
||||
}
|
||||
#endif
|
||||
|
||||
#if HSUART_IRQ_ENABLE
|
||||
if (intrStt2 & UART2_INT_STU)
|
||||
{
|
||||
HSUR_Func();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
#if POWER_MANAGEMENT_IRQ_ENABLE
|
||||
void ax11000_PmmISR(void) __interrupt 11
|
||||
{
|
||||
unsigned int wakeStatus = 0;
|
||||
unsigned int mode = 0;
|
||||
unsigned int sysClk = 0;
|
||||
unsigned int canReg = 0;
|
||||
unsigned int intEnb = 0;
|
||||
|
||||
EA = 0;
|
||||
EIF &= ~INT6F; // Clear the flag of interrupt 6.
|
||||
EA = 1;
|
||||
|
||||
|
||||
|
||||
wakeStatus = PCON;
|
||||
if (!(wakeStatus & SWB_))
|
||||
{
|
||||
PCON &= ~ (PMM_ | STOP_);
|
||||
}
|
||||
|
||||
#if ETH_IRQ_ENABLE
|
||||
/* Ethernet wake up function */
|
||||
/* disable wake up interrupt */
|
||||
MDR = 0;
|
||||
MCIR = MAC_STOP_PMM_INT_ENABLE_REG;
|
||||
/* clear MAC status register */
|
||||
CLI_MacRd((ULONG)MAC_STOP_PMM_INT_STATUS_REG, &WakeStatus, 1);
|
||||
STOE_Standby = 0;
|
||||
#endif
|
||||
|
||||
#if CAN_IRQ_ENABLE
|
||||
/* CAN wake up function */
|
||||
CAN_WakeUpEvent(0); // 0 for exit power management mode
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
#if WATCHDOG_IRQ_ENB
|
||||
ax11000_WatchDogISR(void) __interrupt 12
|
||||
{
|
||||
if (EWDI)
|
||||
{
|
||||
if (EWT)
|
||||
{
|
||||
TA = 0xAA;
|
||||
TA = 0x55;
|
||||
WDIF = 0; // clear WatchDog Interrupt Flag.
|
||||
WTRF = 0; // clear the Watchdog Timer Reset Flag.
|
||||
RWT = 1; // reset watchdog timer.
|
||||
}
|
||||
else
|
||||
{
|
||||
TA = 0xAA;
|
||||
TA = 0x55;
|
||||
WDIF = 0; //clear WatchDog Interrupt Flag.
|
||||
RWT = 1; // reset watchdog timer.
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
25
Asixtool/asix-testcode/interrupt_ax110xx.h
Normal file
25
Asixtool/asix-testcode/interrupt_ax110xx.h
Normal file
|
@ -0,0 +1,25 @@
|
|||
#ifndef INTERRUPT_AX110XX_H
|
||||
#define INTERRUPT_AX110XX_H
|
||||
|
||||
#define LBI_IRQ_ENABLE 0 // Local Bus IRQ; 1:On 2:Off
|
||||
#define ETH_IRQ_ENABLE 0 // Ethernet IRQ; 1:On 2:Off
|
||||
#define I2C_IRQ_ENABLE 0 // I2C IRQ; 1:On 2:Off
|
||||
#define SPI_IRQ_ENABLE 0 // SPI IRQ; 1:On 2:Off
|
||||
#define ONEWIRE_IRQ_ENABLE 0 // OneWire IRQ; 1:On 2:Off
|
||||
#define CAN_IRQ_ENABLE 0 // CAN IRQ; 1:On 2:Off
|
||||
#define HSUART_IRQ_ENABLE 0 // HS-Uart IRQ; 1:On 2:Off
|
||||
#define BOOTLDR_IRQ 0 // Bootloader Source Code; 1:On 2:Off
|
||||
#define POWER_MANAGEMENT_IRQ_ENABLE 0 // Power Management Wake-Up IRQ; 1:On 2:Off
|
||||
#define WATCHDOG_IRQ_ENABLE 0 // Watchdog IRQ; 1:On 2:Off
|
||||
|
||||
#define ON 1
|
||||
#define OFF 0
|
||||
#define EXTINT0(val) {EX0 = val;}
|
||||
#define EXTINT1(val) {EX1 = val;}
|
||||
#define EXTINT2(val) {EINT2 = val;}
|
||||
#define EXTINT3(val) {EINT3 = val;}
|
||||
#define EXTINT4(val) {EINT4 = val;}
|
||||
#define EXTINT5(val) {EINT5 = val;}
|
||||
#define EXTINT6(val) {EINT6 = val;}
|
||||
|
||||
#endif
|
162
Asixtool/asix-testcode/main.c
Normal file
162
Asixtool/asix-testcode/main.c
Normal file
|
@ -0,0 +1,162 @@
|
|||
#include <8052.h>
|
||||
|
||||
#include "ax110xx.h"
|
||||
#include "interrupt_ax110xx.h"
|
||||
#include "cpu_ax110xx.h"
|
||||
#include "types_ax110xx.h"
|
||||
#include "uart/uart.h"
|
||||
|
||||
#define ERASE_EVENT 1
|
||||
#define WRITE_EVENT 2
|
||||
#define READ_EVENT 3
|
||||
|
||||
extern void ax11000_PeripherialISR(void) __interrupt 9;
|
||||
#if UART0_ENABLE
|
||||
extern void uart0_ISR(void) __interrupt 4 __using 2;
|
||||
#endif
|
||||
#if UART1_ENABLE
|
||||
extern void uart1_ISR(void) __interrupt 6 __using 2;
|
||||
#endif
|
||||
|
||||
|
||||
volatile unsigned char hi_flag = 1;
|
||||
volatile unsigned char timer = 0;
|
||||
volatile unsigned char tstate = 0;
|
||||
|
||||
|
||||
void timer0_irq_proc(void) __interrupt 1 using 2
|
||||
{
|
||||
timer++;
|
||||
|
||||
if (timer == 0)
|
||||
{
|
||||
tstate = 1;
|
||||
}
|
||||
|
||||
switch(tstate)
|
||||
{
|
||||
case 1:
|
||||
case 16:
|
||||
P1_0 = 0;
|
||||
break;
|
||||
case 8:
|
||||
case 24:
|
||||
P1_0 = 1;
|
||||
break;
|
||||
default: break;
|
||||
}
|
||||
|
||||
if(tstate)
|
||||
tstate++;
|
||||
|
||||
TR0 = 0; /* Stop Timer 0 counting */
|
||||
TH0 = 0x00;
|
||||
TL0 = 0x00;
|
||||
TR0 = 1; /* Start counting again */
|
||||
}
|
||||
|
||||
void pause(unsigned char len)
|
||||
{
|
||||
unsigned char a;
|
||||
unsigned int b;
|
||||
a=len;
|
||||
b=0xFFFF;
|
||||
while(a--)
|
||||
{
|
||||
while(b--)
|
||||
{
|
||||
__asm
|
||||
nop
|
||||
__endasm;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
unsigned char _sdcc_external_startup()
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
void putstring(char *string)
|
||||
{
|
||||
unsigned char sc;
|
||||
sc = 0;
|
||||
while(string[sc] != 0)
|
||||
putchar(string[sc++]);
|
||||
}
|
||||
|
||||
const char hval[16] = { '0','1','2','3','4','5','6','7','8','9','A','B','C','D','E','F' };
|
||||
|
||||
void putHexB(unsigned char b)
|
||||
{
|
||||
putchar(hval[b>>4]);
|
||||
putchar(hval[b&0x0F]);
|
||||
}
|
||||
|
||||
void putHexW(unsigned int w)
|
||||
{
|
||||
putHexB(w>>8);
|
||||
putHexB(w&0xFF);
|
||||
}
|
||||
|
||||
void putHexD(unsigned long d)
|
||||
{
|
||||
putHexW(d>>16);
|
||||
putHexW(d&0xFFFF);
|
||||
}
|
||||
|
||||
void main(void)
|
||||
{
|
||||
AX11000_Init();
|
||||
|
||||
switch (CSREPR & (BIT6|BIT7))
|
||||
{
|
||||
case SCS_100M :
|
||||
goto three;
|
||||
break;
|
||||
case SCS_50M :
|
||||
goto two;
|
||||
break;
|
||||
case SCS_25M :
|
||||
goto one;
|
||||
break;
|
||||
}
|
||||
|
||||
goto none;
|
||||
|
||||
three:
|
||||
P1 = 0x00;
|
||||
pause(0x07);
|
||||
P1 = 0xFF;
|
||||
pause(0x07);
|
||||
two:
|
||||
P1 = 0x00;
|
||||
pause(0x07);
|
||||
P1 = 0xFF;
|
||||
pause(0x07);
|
||||
one:
|
||||
P1 = 0x00;
|
||||
pause(0x07);
|
||||
P1 = 0xFF;
|
||||
none:
|
||||
|
||||
TCON = 0; /* timer control register, byte operation */
|
||||
TH0 = 0x00;
|
||||
TL0 = 0x00;
|
||||
TR0 = 1; /* start timer0 */
|
||||
ET0 = 1; /* Enable Timer 0 overflow interrupt IE.1 */
|
||||
TI = 0; /* clear this out */
|
||||
|
||||
UART_SetPort(0);
|
||||
|
||||
TMOD = (TMOD & 0xF0) | 0x01; /* timer control mode, byte operation */
|
||||
|
||||
EA = 1; /* Enable Interrupts */
|
||||
|
||||
while (1)
|
||||
{
|
||||
pause(0x0F);
|
||||
|
||||
putstring("Hello World!\n\r");
|
||||
}
|
||||
}
|
162
Asixtool/asix-testcode/main.c.bak
Normal file
162
Asixtool/asix-testcode/main.c.bak
Normal file
|
@ -0,0 +1,162 @@
|
|||
#include <8052.h>
|
||||
|
||||
#include "ax110xx.h"
|
||||
#include "interrupt_ax110xx.h"
|
||||
#include "cpu_ax110xx.h"
|
||||
#include "types_ax110xx.h"
|
||||
#include "uart/uart.h"
|
||||
|
||||
#define ERASE_EVENT 1
|
||||
#define WRITE_EVENT 2
|
||||
#define READ_EVENT 3
|
||||
|
||||
extern void ax11000_PeripherialISR(void) __interrupt 9;
|
||||
#if UART0_ENABLE
|
||||
extern void uart0_ISR(void) __interrupt 4 __using 2;
|
||||
#endif
|
||||
#if UART1_ENABLE
|
||||
extern void uart1_ISR(void) __interrupt 6 __using 2;
|
||||
#endif
|
||||
|
||||
|
||||
volatile unsigned char hi_flag = 1;
|
||||
volatile unsigned char timer = 0;
|
||||
volatile unsigned char tstate = 0;
|
||||
|
||||
|
||||
void timer0_irq_proc(void) __interrupt 1 using 2
|
||||
{
|
||||
timer++;
|
||||
|
||||
if (timer == 0)
|
||||
{
|
||||
tstate = 1;
|
||||
}
|
||||
|
||||
switch(tstate)
|
||||
{
|
||||
case 1:
|
||||
case 16:
|
||||
P1_0 = 0;
|
||||
break;
|
||||
case 8:
|
||||
case 24:
|
||||
P1_0 = 1;
|
||||
break;
|
||||
default: break;
|
||||
}
|
||||
|
||||
if(tstate)
|
||||
tstate++;
|
||||
|
||||
TR0 = 0; /* Stop Timer 0 counting */
|
||||
TH0 = 0x00;
|
||||
TL0 = 0x00;
|
||||
TR0 = 1; /* Start counting again */
|
||||
}
|
||||
|
||||
void pause(unsigned char len)
|
||||
{
|
||||
unsigned char a;
|
||||
unsigned int b;
|
||||
a=len;
|
||||
b=0xFFFF;
|
||||
while(a--)
|
||||
{
|
||||
while(b--)
|
||||
{
|
||||
__asm
|
||||
nop
|
||||
__endasm;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
unsigned char _sdcc_external_startup()
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
void putstring(char *string)
|
||||
{
|
||||
unsigned char sc;
|
||||
sc = 0;
|
||||
while(string[sc] != 0)
|
||||
putchar(string[sc++]);
|
||||
}
|
||||
|
||||
const char hval[16] = { '0','1','2','3','4','5','6','7','8','9','A','B','C','D','E','F' };
|
||||
|
||||
void putHexB(unsigned char b)
|
||||
{
|
||||
putchar(hval[b>>4]);
|
||||
putchar(hval[b&0x0F]);
|
||||
}
|
||||
|
||||
void putHexW(unsigned int w)
|
||||
{
|
||||
putHexB(w>>8);
|
||||
putHexB(w&0xFF);
|
||||
}
|
||||
|
||||
void putHexD(unsigned long d)
|
||||
{
|
||||
putHexW(d>>16);
|
||||
putHexW(d&0xFFFF);
|
||||
}
|
||||
|
||||
void main(void)
|
||||
{
|
||||
AX11000_Init();
|
||||
|
||||
switch (CSREPR & (BIT6|BIT7))
|
||||
{
|
||||
case SCS_100M :
|
||||
goto three;
|
||||
break;
|
||||
case SCS_50M :
|
||||
goto two;
|
||||
break;
|
||||
case SCS_25M :
|
||||
goto one;
|
||||
break;
|
||||
}
|
||||
|
||||
goto none;
|
||||
|
||||
three:
|
||||
P1 = 0x00;
|
||||
pause(0x07);
|
||||
P1 = 0xFF;
|
||||
pause(0x07);
|
||||
two:
|
||||
P1 = 0x00;
|
||||
pause(0x07);
|
||||
P1 = 0xFF;
|
||||
pause(0x07);
|
||||
one:
|
||||
P1 = 0x00;
|
||||
pause(0x07);
|
||||
P1 = 0xFF;
|
||||
none:
|
||||
|
||||
TCON = 0; /* timer control register, byte operation */
|
||||
TH0 = 0x00;
|
||||
TL0 = 0x00;
|
||||
TR0 = 1; /* start timer0 */
|
||||
ET0 = 1; /* Enable Timer 0 overflow interrupt IE.1 */
|
||||
TI = 0; /* clear this out */
|
||||
|
||||
UART_SetPort(0);
|
||||
|
||||
TMOD = (TMOD & 0xF0) | 0x01; /* timer control mode, byte operation */
|
||||
|
||||
EA = 1; /* Enable Interrupts */
|
||||
|
||||
while (1)
|
||||
{
|
||||
pause(0x0F);
|
||||
|
||||
putstring("Hello betty World!\n\r");
|
||||
}
|
||||
}
|
88
Asixtool/asix-testcode/types_ax110xx.h
Normal file
88
Asixtool/asix-testcode/types_ax110xx.h
Normal file
|
@ -0,0 +1,88 @@
|
|||
/*
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2005 ASIX Electronic Corporation All rights reserved.
|
||||
*
|
||||
* This is unpublished proprietary source code of ASIX Electronic Corporation
|
||||
*
|
||||
* The copyright notice above does not evidence any actual or intended
|
||||
* publication of such source code.
|
||||
*********************************************************************************
|
||||
*/
|
||||
/*================================================================================
|
||||
* Module Name : types.h
|
||||
* Purpose : Definition of type.
|
||||
* Author : Robin Lee
|
||||
* Date : 2005-12-28
|
||||
* Notes : None.
|
||||
* $Log: types.h,v $
|
||||
* Revision 1.1 2006/04/07 11:36:17 robin6633
|
||||
* no message
|
||||
*
|
||||
*================================================================================
|
||||
*/
|
||||
|
||||
#ifndef TYPES_H
|
||||
#define TYPES_H
|
||||
|
||||
#ifndef NULL
|
||||
#define NULL ((void *) 0L)
|
||||
#endif
|
||||
|
||||
typedef unsigned short int BOOL;
|
||||
|
||||
#define TRUE 1
|
||||
#define FALSE 0
|
||||
|
||||
/* Bit Definitions for Bitwise Operation */
|
||||
#define BIT0 0x00000001
|
||||
#define BIT1 0x00000002
|
||||
#define BIT2 0x00000004
|
||||
#define BIT3 0x00000008
|
||||
#define BIT4 0x00000010
|
||||
#define BIT5 0x00000020
|
||||
#define BIT6 0x00000040
|
||||
#define BIT7 0x00000080
|
||||
#define BIT8 0x00000100
|
||||
#define BIT9 0x00000200
|
||||
#define BIT10 0x00000400
|
||||
#define BIT11 0x00000800
|
||||
#define BIT12 0x00001000
|
||||
#define BIT13 0x00002000
|
||||
#define BIT14 0x00004000
|
||||
#define BIT15 0x00008000
|
||||
#define BIT16 0x00010000
|
||||
#define BIT17 0x00020000
|
||||
#define BIT18 0x00040000
|
||||
#define BIT19 0x00080000
|
||||
#define BIT20 0x00100000
|
||||
#define BIT21 0x00200000
|
||||
#define BIT22 0x00400000
|
||||
#define BIT23 0x00800000
|
||||
#define BIT24 0x01000000
|
||||
#define BIT25 0x02000000
|
||||
#define BIT26 0x04000000
|
||||
#define BIT27 0x08000000
|
||||
#define BIT28 0x10000000
|
||||
#define BIT29 0x20000000
|
||||
#define BIT30 0x40000000
|
||||
#define BIT31 0x80000000
|
||||
|
||||
#define LOW_BYTE(word) (unsigned char)(word & 0x00FF)
|
||||
#define HIGH_BYTE(word) (unsigned char)((word & 0xFF00) >> 8)
|
||||
|
||||
/* Keil compiler user define */
|
||||
#define XDATA xdata
|
||||
#define IDATA idata
|
||||
#define BDATA bdata
|
||||
#define CODE code
|
||||
#define FAR far
|
||||
|
||||
/* Serial interface command direction */
|
||||
#define SI_WR BIT0
|
||||
#define SI_RD BIT1
|
||||
|
||||
#define FLASH_WR_ENB (PCON |= PWE_)
|
||||
#define FLASH_WR_DISB (PCON &= ~PWE_)
|
||||
|
||||
|
||||
#endif /* end of TYPES_H */
|
821
Asixtool/asix-testcode/uart/uart.c
Normal file
821
Asixtool/asix-testcode/uart/uart.c
Normal file
|
@ -0,0 +1,821 @@
|
|||
/*
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2005 ASIX Electronic Corporation All rights reserved.
|
||||
*
|
||||
* This is unpublished proprietary source code of ASIX Electronic Corporation
|
||||
*
|
||||
* The copyright notice above does not evidence any actual or intended
|
||||
* publication of such source code.
|
||||
*********************************************************************************
|
||||
*/
|
||||
/*================================================================================
|
||||
* Module Name : uart.c
|
||||
* Purpose : The UART module driver. It manages the character
|
||||
* buffer and handles the ISR. This driver includes UART0 and UART1.
|
||||
* Author : Robin Lee
|
||||
* Date : 2006-01-10
|
||||
* Notes : None.
|
||||
* $Log: uart.c,v $
|
||||
* Revision 1.1 2006/04/07 11:39:14 robin6633
|
||||
* no message
|
||||
*
|
||||
*================================================================================
|
||||
*/
|
||||
|
||||
/* INCLUDE FILE DECLARATIONS */
|
||||
#include "../ax110xx.h"
|
||||
#include "uart.h"
|
||||
|
||||
|
||||
|
||||
#if HSUR_ENABLE
|
||||
#include "hsuart.h"
|
||||
#endif
|
||||
|
||||
|
||||
/* STATIC VARIABLE DECLARATIONS */
|
||||
#if UART0_ENABLE
|
||||
static unsigned char uart0_TxBuf[MAX_TX_UART0_BUF_SIZE];
|
||||
static unsigned int uart0_TxHead = 0;
|
||||
static unsigned int uart0_TxTail = 0;
|
||||
static unsigned int uart0_TxCount = 0;
|
||||
static unsigned char uart0_TxFlag = 0;
|
||||
static unsigned char uart0_RxBuf[MAX_RX_UART0_BUF_SIZE];
|
||||
static unsigned int uart0_RxHead = 0;
|
||||
static unsigned int uart0_RxTail = 0;
|
||||
static unsigned char uart0_Mode = 0;
|
||||
unsigned int uart0_RxCount = 0;
|
||||
#endif
|
||||
|
||||
#if UART1_ENABLE
|
||||
static unsigned char uart1_TxBuf[MAX_TX_UART1_BUF_SIZE];
|
||||
static unsigned int uart1_TxHead = 0;
|
||||
static unsigned int uart1_TxTail = 0;
|
||||
static unsigned int uart1_TxCount = 0;
|
||||
static unsigned char uart1_TxFlag = 0;
|
||||
static unsigned char uart1_RxBuf[MAX_RX_UART1_BUF_SIZE];
|
||||
static unsigned int uart1_RxHead = 0;
|
||||
static unsigned int uart1_RxTail = 0;
|
||||
static unsigned char uart1_Mode = 0;
|
||||
unsigned int uart1_RxCount = 0;
|
||||
#endif
|
||||
static unsigned char uartPort = 0;
|
||||
|
||||
|
||||
/* LOCAL SUBPROGRAM DECLARATIONS */
|
||||
#if UART0_ENABLE
|
||||
//void uart0_ISR(void);
|
||||
static void uart0_Init(void);
|
||||
static signed char uart0_PutChar(signed char c);
|
||||
static signed char uart0_GetKey(void);
|
||||
static signed char UART0_NoBlockGetkey(void);
|
||||
#endif
|
||||
#if UART1_ENABLE
|
||||
//void uart1_ISR(void);
|
||||
static void uart1_Init(void);
|
||||
static signed char uart1_PutChar(signed char c);
|
||||
static signed char uart1_GetKey(void);
|
||||
static signed char uart1_NoBlockGetkey(void);
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/* LOCAL SUBPROGRAM BODIES */
|
||||
#if UART0_ENABLE
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* static void UART0_ISR(void)
|
||||
* Purpose : UART0 interrupt service routine. For sending out, it puts data
|
||||
* from software buffer into hardware serial buffer register (SBUF0).
|
||||
* For receiving, it gets data from hardware serial buffer register
|
||||
* (SBUF0) and stores into software buffer.
|
||||
* Params : none
|
||||
* Returns : none
|
||||
* Note : none
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
void uart0_ISR(void) __interrupt 4 __using 2
|
||||
{
|
||||
unsigned char parity = 0;
|
||||
|
||||
if (RI0)
|
||||
{
|
||||
EA = 0;
|
||||
if (uart0_RxCount != MAX_RX_UART0_BUF_SIZE)
|
||||
{
|
||||
uart0_RxBuf[uart0_RxHead] = SBUF0;
|
||||
|
||||
if (uart0_Mode & BIT1)
|
||||
{
|
||||
parity = UART_ParityChk((unsigned char)uart0_RxBuf[uart0_RxHead]);
|
||||
if (RB08 != parity)
|
||||
P3 = 0xE7;
|
||||
}
|
||||
|
||||
uart0_RxCount++;
|
||||
uart0_RxHead++;
|
||||
uart0_RxHead &= MAX_RX_UART0_MASK;
|
||||
}
|
||||
RI0 = 0;
|
||||
EA = 1;
|
||||
} /* End of if(RI0) */
|
||||
|
||||
if (TI0)
|
||||
{
|
||||
EA = 0;
|
||||
|
||||
uart0_TxTail++;
|
||||
uart0_TxTail &= MAX_TX_UART0_MASK;
|
||||
uart0_TxCount--;
|
||||
if (uart0_TxCount > 0)
|
||||
{
|
||||
SBUF0 = uart0_TxBuf[uart0_TxTail];
|
||||
|
||||
if (uart0_Mode & BIT1)
|
||||
{
|
||||
parity = UART_ParityChk((unsigned char)uart0_TxBuf[uart0_TxTail]);
|
||||
if (parity)
|
||||
TB08 = 1;
|
||||
else
|
||||
TB08 = 0;
|
||||
}
|
||||
}
|
||||
else
|
||||
uart0_TxFlag = 0;
|
||||
|
||||
TI0 = 0;
|
||||
EA = 1;
|
||||
|
||||
} /* End of if(TI0) */
|
||||
|
||||
} /* End of UART_Int */
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* static void uart0_Init(void)
|
||||
* Purpose : Setting operation mode of UART0 and initiating the global values.
|
||||
* Params : none
|
||||
* Returns : none
|
||||
* Note : none
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
static void uart0_Init(void)
|
||||
{
|
||||
unsigned char sysClk = 0;
|
||||
unsigned int i;
|
||||
|
||||
uart0_TxHead = 0;
|
||||
uart0_TxTail = 0;
|
||||
uart0_TxCount = 0;
|
||||
uart0_TxFlag = 0;
|
||||
uart0_RxHead = 0;
|
||||
uart0_RxTail = 0;
|
||||
uart0_RxCount = 0;
|
||||
for (i=0 ; i<MAX_TX_UART0_BUF_SIZE ; i++)
|
||||
uart0_TxBuf[i] = 0;
|
||||
for (i=0 ; i<MAX_RX_UART0_BUF_SIZE ; i++)
|
||||
uart0_RxBuf[i] = 0;
|
||||
|
||||
// Initialize TIMER1 for standard 8051 UART clock
|
||||
PCON = 0x80; // Disable BaudRate doubler.
|
||||
SM01 = 1; // Use serial port 0 in mode 1 with 8-bits data.
|
||||
REN0 = 1; // Enable UART0 receiver.
|
||||
TMOD = 0x20; // Use timer 1 in mode 2, 8-bit counter with auto-reload.
|
||||
uart0_Mode = 1;
|
||||
|
||||
sysClk = CSREPR & 0xC0;
|
||||
switch (sysClk)
|
||||
{
|
||||
case SCS_100M :
|
||||
TH1 = 0xE4; // Baud rate = 9600 @ 100MHz.
|
||||
break;
|
||||
case SCS_50M :
|
||||
TH1 = 0xF9; // Baud rate = 9600 @ 50MHz.
|
||||
break;
|
||||
case SCS_25M :
|
||||
TH1 = 0xF9; // Baud rate = 9600 @ 25MHz.
|
||||
break;
|
||||
default :
|
||||
TH1 = 0xF9; // Baud rate = 9600 @ 25MHz.
|
||||
break;
|
||||
}
|
||||
|
||||
ES0 = 1; // Enable serial port Interrupt request
|
||||
TR1 = 1; // Run Timer 1
|
||||
TI0 = 0;
|
||||
|
||||
} /* End of UART_Init */
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* static signed char uart0_PutChar(signed char c)
|
||||
* Purpose : UART0 output function. This function puts one byte data into the
|
||||
* software character buffer.
|
||||
* Params : c - one byte character.
|
||||
* Returns : c - one byte character.
|
||||
* Note : none
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
static signed char uart0_PutChar(signed char c)
|
||||
{
|
||||
unsigned int count = 0;
|
||||
|
||||
if (c == 0xa)
|
||||
{
|
||||
do
|
||||
{
|
||||
EA = 0;
|
||||
count = uart0_TxCount;
|
||||
EA = 1;
|
||||
} while (count == MAX_TX_UART0_BUF_SIZE);
|
||||
uart0_TxBuf[uart0_TxHead] = 0xd;
|
||||
EA = 0;
|
||||
uart0_TxCount++;
|
||||
EA = 1;
|
||||
uart0_TxHead++;
|
||||
uart0_TxHead &= MAX_TX_UART0_MASK;
|
||||
}
|
||||
do
|
||||
{
|
||||
EA = 0;
|
||||
count = uart0_TxCount;
|
||||
EA = 1;
|
||||
} while (count == MAX_TX_UART0_BUF_SIZE);
|
||||
uart0_TxBuf[uart0_TxHead] = c;
|
||||
EA = 0;
|
||||
uart0_TxCount++;
|
||||
EA = 1;
|
||||
uart0_TxHead++;
|
||||
uart0_TxHead &= MAX_TX_UART0_MASK;
|
||||
|
||||
if (!uart0_TxFlag)
|
||||
{
|
||||
uart0_TxFlag = 1;
|
||||
SBUF0 = uart0_TxBuf[uart0_TxTail];
|
||||
}
|
||||
|
||||
|
||||
return c;
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* static signed char uart0_GetKey(void)
|
||||
* Purpose : UART0 input function. This function replies one byte data from the
|
||||
* software character buffer.
|
||||
* Params : none
|
||||
* Returns : c - one byte character.
|
||||
* Note : none
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
static signed char uart0_GetKey (void)
|
||||
{
|
||||
/* NAMING CONSTANT DECLARATIONS */
|
||||
|
||||
/* LOCAL VARIABLE DECLARATIONS */
|
||||
signed char c = 0;
|
||||
/* BODY */
|
||||
while(uart0_RxCount == 0);
|
||||
EA = 0;
|
||||
uart0_RxCount--;
|
||||
EA = 1;
|
||||
c = uart0_RxBuf[uart0_RxTail];
|
||||
uart0_RxTail++;
|
||||
uart0_RxTail &= MAX_RX_UART0_MASK;
|
||||
return c;
|
||||
}
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* static signed char uart0_NoBlockGetkey(void)
|
||||
* Purpose : UART0 input function. This function replies one byte data from the
|
||||
* software character buffer. But it only check the buffer one time.
|
||||
* If no data, it will reply a FALSE condition.
|
||||
* Params : none
|
||||
* Returns : c - one byte character.
|
||||
* Note : none
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
static signed char UART0_NoBlockGetkey (void)
|
||||
{
|
||||
char c = 0;
|
||||
|
||||
if (uart0_RxCount !=0 )
|
||||
{
|
||||
EA = 0;
|
||||
uart0_RxCount--;
|
||||
EA = 1;
|
||||
c = uart0_RxBuf[uart0_RxTail];
|
||||
uart0_RxTail++;
|
||||
uart0_RxTail &= MAX_RX_UART0_MASK;
|
||||
return c;
|
||||
}
|
||||
else
|
||||
{
|
||||
return FALSE;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#if UART1_ENABLE
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* static void UART1_ISR(void)
|
||||
* Purpose : UART1 interrupt service routine. For sending out, it puts data
|
||||
* from software buffer into hardware serial buffer register (SBUF1).
|
||||
* For receiving, it gets data from hardware serial buffer register
|
||||
* (SBUF1) and stores into software buffer.
|
||||
* Params : none
|
||||
* Returns : none
|
||||
* Note : none
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
uart1_ISR(void) __interrupt 6 __using 2
|
||||
{
|
||||
unsigned char parity = 0;
|
||||
|
||||
if (RI1)
|
||||
{
|
||||
EA = 0;
|
||||
if (uart1_RxCount != MAX_RX_UART1_BUF_SIZE)
|
||||
{
|
||||
uart1_RxBuf[uart1_RxHead] = SBUF1;
|
||||
|
||||
if (uart1_Mode & BIT1)
|
||||
{
|
||||
parity = UART_ParityChk((unsigned char)uart1_RxBuf[uart1_RxHead]);
|
||||
if (RB18 != parity)
|
||||
P3 = 0xE7;
|
||||
}
|
||||
|
||||
uart1_RxCount++;
|
||||
uart1_RxHead++;
|
||||
uart1_RxHead &= MAX_RX_UART1_MASK;
|
||||
}
|
||||
RI1 = 0;
|
||||
EA = 1;
|
||||
} /* End of if(RI0) */
|
||||
|
||||
if (TI1)
|
||||
{
|
||||
EA = 0;
|
||||
|
||||
uart1_TxTail++;
|
||||
uart1_TxTail &= MAX_TX_UART1_MASK;
|
||||
uart1_TxCount--;
|
||||
if (uart1_TxCount > 0)
|
||||
{
|
||||
SBUF1 = uart1_TxBuf[uart1_TxTail];
|
||||
|
||||
if (uart1_Mode & BIT1)
|
||||
{
|
||||
parity = UART_ParityChk((unsigned char)uart1_TxBuf[uart1_TxTail]);
|
||||
if (parity)
|
||||
TB18 = 1;
|
||||
else
|
||||
TB18 = 0;
|
||||
}
|
||||
}
|
||||
else
|
||||
uart1_TxFlag = 0;
|
||||
|
||||
TI1 = 0;
|
||||
EA = 1;
|
||||
|
||||
} /* End of if(TI0) */
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* static void uart1_Init(void)
|
||||
* Purpose : Setting operation mode of UART1 and initiating the global values.
|
||||
* Params : none
|
||||
* Returns : none
|
||||
* Note : none
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
static void uart1_Init(void)
|
||||
{
|
||||
unsigned char sysClk = 0;
|
||||
unsigned int i;
|
||||
|
||||
uart1_TxHead = 0;
|
||||
uart1_TxTail = 0;
|
||||
uart1_TxCount = 0;
|
||||
uart1_TxFlag = 0;
|
||||
uart1_RxHead = 0;
|
||||
uart1_RxTail = 0;
|
||||
uart1_RxCount = 0;
|
||||
for (i=0 ; i<MAX_TX_UART1_BUF_SIZE ; i++)
|
||||
uart1_TxBuf[i] = 0;
|
||||
for (i=0 ; i<MAX_RX_UART1_BUF_SIZE ; i++)
|
||||
uart1_RxBuf[i] = 0;
|
||||
|
||||
// Initialize TIMER1 for standard 8051 UART clock
|
||||
PCON = 0; // Disable BaudRate doubler.
|
||||
SM10 = 0;
|
||||
SM11 = 1; // Use serial port 1 in mode 1 with 8-bits data.
|
||||
REN1 = 1; // Enable UART1 receiver.
|
||||
TMOD = 0x20; // Use timer 1 in mode 2, 8-bit counter with auto-reload.
|
||||
uart1_Mode = 1;
|
||||
|
||||
sysClk = CSREPR & 0xC0;
|
||||
switch (sysClk)
|
||||
{
|
||||
case SCS_100M :
|
||||
TH1 = 0xE4; // Baud rate = 9600 @ 100MHz.
|
||||
break;
|
||||
case SCS_50M :
|
||||
TH1 = 0xF2; // Baud rate = 9600 @ 50MHz.
|
||||
break;
|
||||
case SCS_25M :
|
||||
TH1 = 0xF9; // Baud rate = 9600 @ 25MHz.
|
||||
break;
|
||||
default :
|
||||
TH1 = 0xF9; // Baud rate = 9600 @ 25MHz.
|
||||
break;
|
||||
}
|
||||
|
||||
ES1 = 1; // Enable serial port Interrupt request
|
||||
TR1 = 1; // Run Timer 1
|
||||
TI1 = 0;
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* static signed char uart1_PutChar(signed char c)
|
||||
* Purpose : UART1 output function. This function puts one byte data into the
|
||||
* software character buffer.
|
||||
* Params : c - one byte character.
|
||||
* Returns : c - one byte character.
|
||||
* Note : none
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
static signed char uart1_PutChar(signed char c)
|
||||
{
|
||||
unsigned int count = 0;
|
||||
|
||||
if (c == 0xa)
|
||||
{
|
||||
do
|
||||
{
|
||||
EA = 0;
|
||||
count = uart1_TxCount;
|
||||
EA = 1;
|
||||
} while (count == MAX_TX_UART1_BUF_SIZE);
|
||||
uart1_TxBuf[uart1_TxHead] = 0xd;
|
||||
EA = 0;
|
||||
uart1_TxCount++;
|
||||
EA = 1;
|
||||
uart1_TxHead++;
|
||||
uart1_TxHead &= MAX_TX_UART1_MASK;
|
||||
}
|
||||
do
|
||||
{
|
||||
EA = 0;
|
||||
count = uart1_TxCount;
|
||||
EA = 1;
|
||||
} while (count == MAX_TX_UART1_BUF_SIZE);
|
||||
uart1_TxBuf[uart1_TxHead] = c;
|
||||
EA = 0;
|
||||
uart1_TxCount++;
|
||||
EA = 1;
|
||||
uart1_TxHead++;
|
||||
uart1_TxHead &= MAX_TX_UART1_MASK;
|
||||
|
||||
if (!uart1_TxFlag)
|
||||
{
|
||||
uart1_TxFlag = 1;
|
||||
SBUF1 = uart1_TxBuf[uart1_TxTail];
|
||||
}
|
||||
|
||||
return c;
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* static signed char uart1_GetKey(void)
|
||||
* Purpose : UART1 input function. This function replies one byte data from the
|
||||
* software character buffer.
|
||||
* Params : none
|
||||
* Returns : c - one byte character.
|
||||
* Note : none
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
static signed char uart1_GetKey (void)
|
||||
{
|
||||
/* NAMING CONSTANT DECLARATIONS */
|
||||
|
||||
/* LOCAL VARIABLE DECLARATIONS */
|
||||
signed char c;
|
||||
/* BODY */
|
||||
while(uart1_RxCount==0);
|
||||
EA = 0;
|
||||
uart1_RxCount--;
|
||||
EA = 1;
|
||||
c = uart1_RxBuf[uart1_RxTail];
|
||||
uart1_RxTail++;
|
||||
uart1_RxTail &= MAX_RX_UART1_MASK;
|
||||
return c;
|
||||
}
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* static signed char uart1_NoBlockGetkey(void)
|
||||
* Purpose : UART1 input function. This function replies one byte data from the
|
||||
* software character buffer. But it only check the buffer one time.
|
||||
* If no data, it will reply a FALSE condition.
|
||||
* Params : none
|
||||
* Returns : c - one byte character.
|
||||
* Note : none
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
static signed char uart1_NoBlockGetkey (void)
|
||||
{
|
||||
char c = 0;
|
||||
|
||||
if (uart1_RxCount !=0 )
|
||||
{
|
||||
EA = 0;
|
||||
uart1_RxCount--;
|
||||
EA = 1;
|
||||
c = uart1_RxBuf[uart1_RxTail];
|
||||
uart1_RxTail++;
|
||||
uart1_RxTail &= MAX_RX_UART1_MASK;
|
||||
return c;
|
||||
}
|
||||
else
|
||||
{
|
||||
return FALSE;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/* EXPORTED SUBPROGRAM BODIES */
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* signed char _getkey (void)
|
||||
* Purpose : UART getkey function. This function is the entry of getting
|
||||
* characters from software buffer of system's UART ports,
|
||||
* UART0, UART1 and HSUR.
|
||||
* Params : none
|
||||
* Returns : ch - one byte character.
|
||||
* Note : The default UART port is UART0.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
signed char _getkey (void)
|
||||
{
|
||||
signed char ch = 0;
|
||||
|
||||
switch (uartPort)
|
||||
{
|
||||
#if UART0_ENABLE
|
||||
case 0 :
|
||||
ch = uart0_GetKey();
|
||||
break;
|
||||
#endif
|
||||
#if UART1_ENABLE
|
||||
case 1 :
|
||||
ch = uart1_GetKey();
|
||||
break;
|
||||
#endif
|
||||
#if HSUR_ENABLE
|
||||
case 2 :
|
||||
ch = HSUR_GetChar();
|
||||
break;
|
||||
#endif
|
||||
}
|
||||
|
||||
return ch;
|
||||
}
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* signed char putchar(signed char c)
|
||||
* Purpose : UART putchar function. This function is the entry of putting
|
||||
* characters into software buffer of system's UART ports,
|
||||
* UART0, UART1 and HSUR.
|
||||
* Params : c - one byte character to be put.
|
||||
* Returns : ch - the same character to be replied.
|
||||
* Note : The default UART port is UART0.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
signed char putchar(signed char c)
|
||||
{
|
||||
signed char ch = 0;
|
||||
|
||||
switch (uartPort)
|
||||
{
|
||||
#if UART0_ENABLE
|
||||
case 0 :
|
||||
ch = uart0_PutChar(c);
|
||||
break;
|
||||
#endif
|
||||
#if UART1_ENABLE
|
||||
case 1 :
|
||||
ch = uart1_PutChar(c);
|
||||
break;
|
||||
#endif
|
||||
#if HSUR_ENABLE
|
||||
case 2 :
|
||||
ch = HSUR_PutChar(c);
|
||||
break;
|
||||
#endif
|
||||
}
|
||||
|
||||
return ch;
|
||||
}
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* void UART_Init(void)
|
||||
* Purpose : UART initial function. It will call a real initial function
|
||||
* corresponding to the used UART port.
|
||||
* Params : none
|
||||
* Returns : none
|
||||
* Note : none
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
void UART_Init(void)
|
||||
{
|
||||
switch (uartPort)
|
||||
{
|
||||
#if UART0_ENABLE
|
||||
case 0 :
|
||||
uart0_Init();
|
||||
break;
|
||||
#endif
|
||||
#if UART1_ENABLE
|
||||
case 1 :
|
||||
uart1_Init();
|
||||
break;
|
||||
#endif
|
||||
#if HSUR_ENABLE
|
||||
case 2 :
|
||||
HSUR_Init();
|
||||
HSUR_Setup(0x0060, (UR2_CHAR_8|UR2_STOP_10), (UR2_RDI_ENB|UR2_RLSI_ENB),
|
||||
(UR2_FIFO_MODE|UR2_RXFIFO_RST|UR2_TXFIFO_RST|UR2_TRIG_08), UR2_RTS);
|
||||
break;
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* signed char NOBLK_getkey (void)
|
||||
* Purpose : UART no blocking getkey function with one checked. This function
|
||||
* is the entry of getting characters from software buffer of
|
||||
* system's UART ports, UART0, UART1 and HSUR.
|
||||
* Params : none
|
||||
* Returns : ch - one byte character.
|
||||
* Note : The default UART port is UART0.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
signed char NOBLK_getkey (void)
|
||||
{
|
||||
signed char c = 0;
|
||||
|
||||
switch (uartPort)
|
||||
{
|
||||
#if UART0_ENABLE
|
||||
case 0 :
|
||||
c = UART0_NoBlockGetkey();
|
||||
break;
|
||||
#endif
|
||||
#if UART1_ENABLE
|
||||
case 1 :
|
||||
c = uart1_NoBlockGetkey();
|
||||
break;
|
||||
#endif
|
||||
}
|
||||
|
||||
return c;
|
||||
}
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* BOOL UART_ParityChk(signed char checkByte)
|
||||
* Purpose : UART parity checked function in one byte transfer.
|
||||
* Params : checkByte - one byte character.
|
||||
* Returns : TRUE - odd parity ; FALSE - even parity.
|
||||
* Note : none
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
BOOL UART_ParityChk(signed char checkByte)
|
||||
{
|
||||
unsigned char oneNum = 0;
|
||||
unsigned int i;
|
||||
|
||||
oneNum = 0;
|
||||
for (i=0 ; i<=7 ; i++)
|
||||
{
|
||||
if (checkByte & (BIT0<<i))
|
||||
{
|
||||
oneNum ++;
|
||||
}
|
||||
}
|
||||
if ((oneNum % 2) == 0)
|
||||
return FALSE; // if '1' number is even, return 0
|
||||
else
|
||||
return TRUE; // if '1' number is odd, return 1
|
||||
}
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* void UART0_SetMode(unsigned char mode)
|
||||
* Purpose : Setting operation mode of UART0.
|
||||
* Params : mode - operation mode (0~3).
|
||||
* Returns : none
|
||||
* Note : none
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
#if UART0_ENABLE
|
||||
void UART0_SetMode(unsigned char mode)
|
||||
{
|
||||
uart0_Mode = mode;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* void UART1_SetMode(unsigned char mode)
|
||||
* Purpose : Setting operation mode of UART0.
|
||||
* Params : mode - operation mode (0~3).
|
||||
* Returns : none
|
||||
* Note : none
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
#if UART1_ENABLE
|
||||
void UART1_SetMode(unsigned char mode)
|
||||
{
|
||||
uart1_Mode = mode;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* BOOL UART_SetPort(unsigned char portNum)
|
||||
* Purpose : Setting which UART port will be used.
|
||||
* Params : portNum - uart port number (0~2).
|
||||
* Returns : none
|
||||
* Note : none
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
BOOL UART_SetPort(unsigned char portNum)
|
||||
{
|
||||
uartPort = portNum & 0x03;
|
||||
UART_Init();
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* void PMM_Uart0Init(void)
|
||||
* Purpose : Initiating the UART0 to work in power management mode.
|
||||
* Params : none
|
||||
* Returns : none
|
||||
* Note : none
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
#if UART_PMM_ENABLE
|
||||
void PMM_Uart0Init(void)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
uart0_TxHead = 0;
|
||||
uart0_TxTail = 0;
|
||||
uart0_TxCount = 0;
|
||||
uart0_TxFlag = 0;
|
||||
uart0_RxHead = 0;
|
||||
uart0_RxTail = 0;
|
||||
uart0_RxCount = 0;
|
||||
for (i=0 ; i<MAX_TX_UART0_BUF_SIZE ; i++)
|
||||
uart0_TxBuf[i] = 0;
|
||||
for (i=0 ; i<MAX_RX_UART0_BUF_SIZE ; i++)
|
||||
uart0_RxBuf[i] = 0;
|
||||
|
||||
// Initialize TIMER1 for standard 8051 UART clock
|
||||
PCON = BIT7; // Enable BaudRate doubler.
|
||||
SM01 = 1; // Use serial port 0 in mode 1 with 8-bits data.
|
||||
REN0 = 1; // Enable UART0 receiver.
|
||||
TMOD = 0x20; // Use timer 1 in mode 2, 8-bit counter with auto-reload.
|
||||
|
||||
TH1 = 0xFE; // Baud rate = 1200 @ 25MHz.
|
||||
|
||||
ES0 = 1; // Enable serial port Interrupt request
|
||||
TR1 = 1; // Run Timer 1
|
||||
TI0 = 0;
|
||||
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/* End of uart.c */
|
74
Asixtool/asix-testcode/uart/uart.h
Normal file
74
Asixtool/asix-testcode/uart/uart.h
Normal file
|
@ -0,0 +1,74 @@
|
|||
/*
|
||||
******************************************************************************
|
||||
* Copyright (c) 2005 ASIX Electronic Corporation All rights reserved.
|
||||
*
|
||||
* This is unpublished proprietary source code of ASIX Electronic Corporation
|
||||
*
|
||||
* The copyright notice above does not evidence any actual or intended
|
||||
* publication of such source code.
|
||||
******************************************************************************
|
||||
*/
|
||||
/*================================================================================
|
||||
* Module Name : uart.h
|
||||
* Purpose : A header file of uart.c includes UART0 and UART1 module.
|
||||
* Author : Robin Lee
|
||||
* Date : 2006-01-10
|
||||
* Notes :
|
||||
* $Log: uart.h,v $
|
||||
* Revision 1.1 2006/04/07 11:39:14 robin6633
|
||||
* no message
|
||||
*
|
||||
*================================================================================
|
||||
*/
|
||||
|
||||
#ifndef __UART_H__
|
||||
#define __UART_H__
|
||||
|
||||
#include "../types_ax110xx.h"
|
||||
|
||||
#define UART0_ENABLE 1 // 1:enable UART0 ; 0:disable UART0
|
||||
#define UART1_ENABLE 0 // 1:enable UART1 ; 0:disable UART1
|
||||
#define HSUR_ENABLE 0 // 1:enable Hihg Speed UART ; 0:disable Hihg Speed UART
|
||||
#define UART_PMM_ENABLE 0 // 1:use UART in PMM mode ; 0:disable
|
||||
|
||||
|
||||
/* NAMING CONSTANT DECLARATIONS */
|
||||
#if UART0_ENABLE
|
||||
#define MAX_TX_UART0_BUF_SIZE 512
|
||||
#define MAX_TX_UART0_MASK (MAX_TX_UART0_BUF_SIZE - 1)
|
||||
#define MAX_RX_UART0_BUF_SIZE 512
|
||||
#define MAX_RX_UART0_MASK (MAX_RX_UART0_BUF_SIZE - 1)
|
||||
#endif
|
||||
|
||||
#if UART1_ENABLE
|
||||
#define MAX_TX_UART1_BUF_SIZE 512
|
||||
#define MAX_TX_UART1_MASK (MAX_TX_UART1_BUF_SIZE - 1)
|
||||
#define MAX_RX_UART1_BUF_SIZE 512
|
||||
#define MAX_RX_UART1_MASK (MAX_RX_UART1_BUF_SIZE - 1)
|
||||
#endif
|
||||
|
||||
/* GLOBAL VARIABLES */
|
||||
#if UART0_ENABLE
|
||||
extern unsigned int uart0_RxCount;
|
||||
#endif
|
||||
|
||||
#if UART1_ENABLE
|
||||
extern unsigned int uart1_RxCount;
|
||||
#endif
|
||||
|
||||
|
||||
/* EXPORTED SUBPROGRAM SPECIFICATIONS */
|
||||
void UART_Init(void);
|
||||
signed char putchar(signed char);
|
||||
signed char _getkey(void);
|
||||
signed char NOBLK_getkey(void);
|
||||
BOOL UART_ParityChk(signed char checkbyte);
|
||||
void UART0_SetMode(unsigned char mode);
|
||||
void UART1_SetMode(unsigned char mode);
|
||||
BOOL UART_SetPort(unsigned char portNum);
|
||||
void PMM_Uart0Init(void);
|
||||
|
||||
|
||||
#endif /* End of __UART_H__ */
|
||||
|
||||
/* End of uart.h */
|
Loading…
Add table
Add a link
Reference in a new issue